JAJSIL5B February 2020 – October 2024 ADC12DJ1600-Q1 , ADC12QJ1600-Q1 , ADC12SJ1600-Q1
PRODUCTION DATA
Foreground calibration and background calibration modes inherently calibrate the offsets of the ADC cores; however, the input buffers sit outside of the calibration loop and therefore their offsets are not calibrated by the standard calibration process. A separate calibration is provided to correct the input buffer offsets.
There must be no signals at or near DC or aliased signals that fall at or near DC in order to properly calibration the offsets, requiring the system to specify this condition during normal operation or have the ability to mute the input signal during calibration. Foreground offset calibration is enabled via CAL_OS and only performs the calibration one time as part of the foreground calibration procedure. Background offset calibration is enabled via CAL_BGOS and continues to correct the offset as part of the background calibration routine to account for operating condition changes. When CAL_BGOS is set, the system must make sure that there are no DC or near DC signals or aliased signals that fall at or near DC during normal operation. Offset calibration can be performed as a foreground operation when using background calibration by setting CAL_OS to 1 before setting CAL_EN, but does not correct for variations as operating conditions change.
The offset calibration correction uses the input offset voltage trim registers (see OFS0 to OFS5) to correct the offset and therefore must not be written by the user when offset calibration is used. The user can read the calibrated values by reading the offset trim registers after calibration is completed and then use these values in the future to overwrite the factory trim values. Only read the values when FG_DONE is read as 1 when using foreground offset calibration (CAL_OS = 1) and do not read the values when using background offset calibration (CAL_BGOS = 1). Setting CAL_OS to 1 and CAL_BG to 1 performs an offset calibration of all six cores during the foreground calibration process.
Some systems, such as pulsed input systems, may purposefully apply a large external DC offset to the analog inputs to maximize the dynamic range for uni-polar signals. Standard offset calibration does not work for these systems because of the applied DC offset. These systems can instead set OSREF to use the spare ADC as the offset reference and then calibrate the main ADC cores to match the spare offset. This allows seamless offset transitions during background calibration swapping.