JAJSGV3B September 2015 – January 2019 ADC31JB68
PRODUCTION DATA.
The SYNCb input is part of the JESD204B interface and is used to send synchronization requests from the serial data receiver to the transmitter. The SYNCb signal, quantified as the (SYNCb+ – SYNCb–), is a differential active low signal. In the case of the ADC31JB68 device, a JESD204B subclass 1 device, a SYNCb assertion (logic low) indicates a request for synchronization by the receiver. The SYNCb input is an asynchronous input and does not have sub-clock-cycle setup and hold requirements relative to the CLKIN or any other input to the ADC31JB68 device.
The SYNCb input is a differential receiver as shown in Figure 74. Resistors provide an internal 100-Ω differential termination as well as a voltage divider circuit that gives the SYNCb receiver a wide input common-mode range. The SYNCb signal must be DC coupled from the driver to the SYNCb inputs; therefore, the wide common-mode range allows the use of many different logic standards including LVDS and LVPECL. No additional external components are needed for the SYNCb signal path as shown in the interface circuit of Figure 74, but providing an electrical probing site is recommended for system debug.