JAJSCV8 データシート

JAJSCV8B May 2016 – December 2021 ADC32RF80 , ADC32RF83

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RMP|72
- MPQF396A
RRH|72
- MPQF526

サーマルパッド・メカニカル・データ

発注情報

8.3.2 Clock Input

The ADC32RF8x sampling clock input includes internal 100-Ω differential termination along with on-chip biasing. The clock input is recommended to be ac-coupled externally. The input bandwidth of the clock input is approximately 3 GHz; the clock input impedance is shown in the smith chart of Figure 8-8 with a 100-Ω reference impedance.

Figure 8-8 SDD11 of the Clock Input

The analog-to-digital converter (ADC) aperture jitter is a function of the clock amplitude applied to the pins. The equivalent aperture jitter is shown in Figure 8-9 for input frequencies at a 1-GHz and a 2-GHz input. Depending on the clock frequency, a matching circuit can be designed in order to maximize the clock amplitude.

Figure 8-9 Equivalent Aperture Jitter vs. Input Clock Amplitude