JAJSCV8B May 2016 – December 2021 ADC32RF80 , ADC32RF83
PRODUCTION DATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | DDC0 6DB GAIN |
W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-1 | 0 | W | 0h | Must write 0 |
0 | DDC0 6DB GAIN | R/W | 0h | This bit scales the output of DDC0 by 2 (6 dB) to compensate for real-to-complex conversion and image suppression. This scaling does not apply to the high-bandwidth filter path (divide-by-4 and -6); see register 1Fh. 0 = Normal operation 1 = 6-dB digital gain is added |