JAJSIB2 December 2019 ADC3421-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | DIS DITH CHC | 0 | DIS DITH CHC | 0 | 0 | 0 |
W-0h | W-0h | R/W-0h | W-0h | R/W-0h | W-0h | W-0h | W-0h |
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-6 | 0 | W | 0h | Must write 0. |
5 | DIS DITH CHC | R/W | 0h | Set this bit with bits 3 and 2 of register 01h.
00 = Default 11 = Dither is disabled for channel C. In this mode, SNR typically improves by 0.2 dB at 70 MHz. |
4 | 0 | W | 0h | Must write 0. |
3 | DIS DITH CHC | R/W | 0h | Set this bit with bits 3 and 2 of register 01h.
00 = Default 11 = Dither is disabled for channel C. In this mode, SNR typically improves by 0.2 dB at 70 MHz. |
2-0 | 0 | W | 0h | Must write 0. |