JAJSNQ4 March 2023 ADC34RF52
PRODUCTION DATA
In this mode the GPIO1/2 pins are used as a "fast SPI" input which only updates the NCO selection registers. No register address information needs to be sent. GPIO1 pin is SDATA and GPIO2 pin is SCLK.
This mode is enabled by setting the SPISEL to logic high and using the following register writes:
The NCO frequencies are selected as shown in Table 7-27.
# OF BANDS | D15 | D14 | D13 | D12 | D11 | D10 | D9 | D8 | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
SINGLE | NCO1 CHD [2] | 0 | NCO1 CHD [1:0] | NCO1 CHC [2] | 0 | NCO1 CHC [1:0] | NCO1 CHB [2] | 0 | NCO1 CHB [1:0] | NCO1 CHA [2] | 0 | NCO1 CHA [1:0] | ||||
DUAL | NCO2 CHD [1:0] | NCO1 CHD [1:0] | NCO2 CHC [1:0] | NCO1 CHC [1:0] | NCO2 CHB [1:0] | NCO1 CHB [1:0] | NCO2 CHA [1:0] | NCO1 CHA [1:0] |