SBASAU8 December   2024 ADC3649

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - Power Consumption
    6. 6.6  Electrical Characteristics - DC Specifications
    7. 6.7  Electrical Characteristics - AC Specifications (ADC3648 - 250 MSPS)
    8. 6.8  Electrical Characteristics - AC Specifications (ADC3649 - 500 MSPS)
    9. 6.9  Timing Requirements
    10. 6.10 Typical Characteristics, ADC3648
    11. 6.11 Typical Characteristics, ADC3649
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Inputs
        1. 8.3.1.1 Nyquist Zone Selection
        2. 8.3.1.2 Analog Front End Design
      2. 8.3.2 Sampling Clock
      3. 8.3.3 Multi-Chip Synchronization
        1. 8.3.3.1 SYSREF Monitor
      4. 8.3.4 Time-Stamp
      5. 8.3.5 Overrange
      6. 8.3.6 External Voltage Reference
      7. 8.3.7 Digital Gain
      8. 8.3.8 Decimation Filter
        1. 8.3.8.1 Uncommon Decimation Ratios
        2. 8.3.8.2 Decimation Filter Response
        3. 8.3.8.3 Decimation Filter Configuration
        4. 8.3.8.4 Numerically Controlled Oscillator (NCO)
      9. 8.3.9 Digital Interface
        1. 8.3.9.1 Parallel LVDS
        2. 8.3.9.2 Serial LVDS (SLVDS) with Decimation
          1. 8.3.9.2.1 SLVDS - Status Bit Insertion
        3. 8.3.9.3 Output Data Format
        4. 8.3.9.4 32-bit Output Resolution
        5. 8.3.9.5 Output Scrambler
        6. 8.3.9.6 Output MUX
        7. 8.3.9.7 Test Pattern
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low Latency Mode
      2. 8.4.2 Digital Channel Averaging
      3. 8.4.3 Power Down Mode
    5. 8.5 Programming
      1. 8.5.1 GPIO Programming
      2. 8.5.2 Register Write
      3. 8.5.3 Register Read
      4. 8.5.4 Device Programming
      5. 8.5.5 Register Map
      6. 8.5.6 Detailed Register Description
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Wideband Spectrum Analyzer
      2. 9.2.2 Design Requirements
        1. 9.2.2.1 Input Signal Path
        2. 9.2.2.2 Clocking
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Sampling Clock
      4. 9.2.4 Application Performance Plots
    3. 9.3 Initialization Set Up
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics - AC Specifications (ADC3649 - 500 MSPS)

Maximum and minimum values are specified over the operating free-air temperature range and nominal supply voltages. Typical values are specified at TA = 25°C, ADC sampling rate = 500 MSPS, DDC Bypass mode, 50% clock duty cycle, nominal supply voltages and –1-dBFS differential input, internal reference, unless otherwise noted
PARAMETER TEST CONDITIONS MIN(1) TYP MAX UNIT
AC ACCURACY
NSD Noise Spectral Density fIN = 100 MHz, AIN = -20 dBFS –158.5 dBFS/Hz
NF Noise Figure fIN = 100 MHz, AIN = -20 dBFS 22.5 dB
SNR Signal to noise ratio fIN = 10 MHz 74.0 dBFS
fIN = 70 MHz 70 73.8
fIN = 170 MHz 73.2
fIN = 300 MHz 71.6
fIN = 450 MHz 69.6
SINAD Signal to noise and distortion ratio fIN = 10 MHz 72.1 dBFS
fIN = 70 MHz 71.9
fIN = 170 MHz 71.3
fIN = 300 MHz 69.7
fIN = 450 MHz 67.8
ENOB Effective number of bits fIN = 10 MHz 11.7 Bits
fIN = 70 MHz 11.7
fIN = 170 MHz 11.6
fIN = 300 MHz 11.3
fIN = 450 MHz 11.0
THD Total Harmonic Distortion (First five harmonics) fIN = 10 MHz 74 dBc
fIN = 70 MHz 77
fIN = 170 MHz 74
fIN = 300 MHz 68
fIN = 450 MHz 63
HD2 Second Harmonic Distortion fIN = 10 MHz 76 dBc
fIN = 70 MHz 69 82
fIN = 170 MHz 77
fIN = 300 MHz 81
fIN = 450 MHz 76
HD3 Third Harmonic Distortion fIN = 10 MHz 88 dBc
fIN = 70 MHz 71 80
fIN = 170 MHz 83
fIN = 300 MHz 71
fIN = 450 MHz 65
Non HD2,3 Spur free dynamic range (excluding HD2 and HD3) fIN = 10 MHz 94 dBFS
fIN = 70 MHz 94
fIN = 170 MHz 90
fIN = 300 MHz 86
fIN = 450 MHz 87
IMD3 Two tone inter-modulation distortion f1 = 100 MHz, f2 = 120 MHz, AIN = -7 dBFS/tone 86 dBc
SNR and HD3 minimum values are specified by ATE; HD2 is specified by bench characterization.