SBASAP7
December 2024
ADC3664-SP
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics - Power Consumption
5.6
Electrical Characteristics - DC Specifications
5.7
Electrical Characteristics - AC Specifications
5.8
Timing Requirements
5.9
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Analog Input
7.3.1.1
Analog Input Bandwidth
7.3.1.2
Analog Front End Design
7.3.1.2.1
Sampling Glitch Filter
7.3.1.2.2
AC Coupling
7.3.1.2.3
DC Coupling
7.3.2
Clock Input
7.3.2.1
Differential Vs Single-ended Clock Input
7.3.2.2
Signal Acquisition Time Adjust
7.3.3
Voltage Reference
7.3.3.1
Internal Voltage Reference
7.3.3.2
External Voltage Reference
7.3.4
Digital Data Path & Interface
7.3.4.1
Data Path Overview
7.3.4.2
Digital Interface
7.3.4.3
DCLKIN
7.3.4.4
Output Scrambler
7.3.4.5
Output Bit Mapper
7.3.4.5.1
2-Wire Mode
7.3.4.5.2
1-Wire Mode
7.3.4.5.3
1/2-Wire Mode
7.3.4.6
Output Data Format
7.3.4.7
Test Pattern
7.3.5
Digital Down Converter
7.3.5.1
Decimation Operation
7.3.5.2
Numerically Controlled Oscillator (NCO)
7.3.5.3
Decimation Filters
7.3.5.4
SYNC
7.3.5.5
Output Data Format with Decimation
7.4
Device Functional Modes
7.4.1
Low Latency Mode
7.4.2
Averaging Mode
7.5
Programming
7.5.1
Pin Control
7.5.2
Serial Peripheral Interface (SPI)
7.5.2.1
Register Write
7.5.2.2
Register Read
7.5.3
Device Configuration Steps
7.5.4
Register Map
7.5.4.1
Detailed Register Description
8
Application Information Disclaimer
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.3
Initialization Set Up
8.4
Power Supply Recommendations
8.5
Layout
8.5.1
Layout Guidelines
8.5.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Electrostatic Discharge Caution
9.5
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
11.1
Mechanical Data
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
HBP|64
サーマルパッド・メカニカル・データ
発注情報
sbasap7_oa
1
Features
Screening and radiation performance
QMLV screening and reliability assurance
Total ionizing dose (TID): 300krad (Si)
Single event latch-up (SEL): 75MeV-cm
2
/mg
Ambient temperature range: -55°C to 105°C
Dual Channel ADC
14-bit 125MSPS
Noise floor: -156.9dBFS/Hz
Low power consumption: 100mW/ch
Latency: 2 clock cycles
Clock rate versus voltage reference:
External reference: 1MSPS to 125MSPS
Internal reference: 100MSPS to 125MSPS
14-Bit, no missing codes
Input bandwidth: 200MHz (-3dB)
INL: ±2.6LSB; DNL: ±0.9LSB
Optional digital down converter (DDC):
Real or complex decimation
Decimation by 2, 4, 8, 16, and 32
32-bit NCO
Serial LVDS (SLVDS) interface (2-, 1-, and
1/2-wire)
Spectral performance (F
IN
= 5MHz):
SNR: 77.5dBFS
SFDR: 84dBc HD2, HD3
Non HD23: 91dBc