JAJSEC5E
December 2011 – December 2022
ADS1113-Q1
,
ADS1114-Q1
,
ADS1115-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements: I2C
6.7
Timing Diagram
6.8
Typical Characteristics
7
Parameter Measurement Information
7.1
Noise Performance
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagrams
8.3
Feature Description
8.3.1
Multiplexer
8.3.2
Analog Inputs
8.3.3
Full-Scale Range (FSR) and LSB Size
8.3.4
Voltage Reference
8.3.5
Oscillator
8.3.6
Output Data Rate and Conversion Time
8.3.7
Digital Comparator (ADS1114-Q1 and ADS1115-Q1 Only)
8.3.8
Conversion Ready Pin (ADS1114-Q1 and ADS1115-Q1 Only)
8.3.9
SMBus のアラート応答
8.4
Device Functional Modes
8.4.1
Reset and Power-Up
8.4.2
Operating Modes
8.4.2.1
Single-Shot Mode
8.4.2.2
Continuous-Conversion Mode
8.4.3
Duty Cycling For Low Power
8.5
Programming
8.5.1
I2C Interface
8.5.1.1
I2C Address Selection
8.5.1.2
I2C General Call
8.5.1.3
I2C Speed Modes
8.5.2
Target Mode Operations
8.5.2.1
Receive Mode
8.5.2.2
Transmit Mode
8.5.3
Writing To and Reading From the Registers
8.5.4
Data Format
8.6
Register Map
8.6.1
Address Pointer Register (address = N/A) [reset = N/A]
8.6.2
Conversion Register (P[1:0] = 00b) [reset = 0000h]
8.6.3
Config Register (P[1:0] = 01b) [reset = 8583h]
8.6.4
Lo_thresh (P[1:0] = 10b) [reset = 8000h] and Hi_thresh (P[1:0] = 11b) [reset = 7FFFh] Registers
9
Application and Implementation
9.1
Application Information
9.1.1
Basic Connections
9.1.2
Single-Ended Inputs
9.1.3
Input Protection
9.1.4
Unused Inputs and Outputs
9.1.5
Analog Input Filtering
9.1.6
Connecting Multiple Devices
9.1.7
Quick-Start Guide
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Shunt Resistor Considerations
9.2.2.2
Operational Amplifier Considerations
9.2.2.3
ADC Input Common-Mode Considerations
9.2.2.4
Resistor (R1, R2, R3, R4) Considerations
9.2.2.5
Noise and Input Impedance Considerations
9.2.2.6
First-Order RC Filter Considerations
9.2.2.7
Circuit Implementation
9.2.2.8
Results Summary
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.3.1
Power-Supply Sequencing
9.3.2
Power-Supply Decoupling
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
サポート・リソース
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGS|10
MPDS035C
NKS|10
MPQF680
サーマルパッド・メカニカル・データ
発注情報
jajsec5e_oa
jajsec5e_pm
9.2.3
Application Curves
Figure 9-7
Measured Output vs Shunt Voltage (V
SHUNT
)
Figure 9-8
Measurement Error vs Shunt Voltage (V
SHUNT
)