JAJSQJ6 December 2023 ADS1114L , ADS1115L
PRODUCTION DATA
A programmable gain amplifier (PGA) is implemented before the ΔΣ ADC of the ADS111xL. The full-scale range is configured by the PGA[2:0] bits in the Configuration register and can be set to ±6.144 V, ±4.096 V, ±2.048 V, ±1.024 V, ±0.512 V, and ±0.256 V. Table 8-1 shows the FSR together with the corresponding LSB size. Equation 4 shows how to calculate the LSB size from the selected full-scale range.
FSR | LSB SIZE |
---|---|
±6.144 V(1) | 187.5 μV |
±4.096 V(1) | 125 μV |
±2.048 V | 62.5 μV |
±1.024 V | 31.25 μV |
±0.512 V | 15.625 μV |
±0.256 V | 7.8125 μV |
Analog input voltages must never exceed the analog input voltage limits given in the Absolute Maximum Ratings. The ±4.096-V and ±6.144-V full-scale range settings allow input voltages to extend up to the supply. Although in this case, or whenever the supply voltage is less than the full-scale range (for example, VDD = 3.3 V and full-scale range = ±4.096 V), a full-scale ADC output code cannot be obtained. For example, with VDD = 3.3 V and FSR = ±4.096 V, only differential signals up to VIN = ±3.3 V can be measured. The code range that represents voltages |VIN| > 3.3 V is not used in this case.