JAJSEC5E December   2011  – December 2022 ADS1113-Q1 , ADS1114-Q1 , ADS1115-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
    1.     Device Comparison Table
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements: I2C
    7. 6.7 Timing Diagram
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Noise Performance
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Multiplexer
      2. 8.3.2 Analog Inputs
      3. 8.3.3 Full-Scale Range (FSR) and LSB Size
      4. 8.3.4 Voltage Reference
      5. 8.3.5 Oscillator
      6. 8.3.6 Output Data Rate and Conversion Time
      7. 8.3.7 Digital Comparator (ADS1114-Q1 and ADS1115-Q1 Only)
      8. 8.3.8 Conversion Ready Pin (ADS1114-Q1 and ADS1115-Q1 Only)
      9. 8.3.9 SMBus のアラート応答
    4. 8.4 Device Functional Modes
      1. 8.4.1 Reset and Power-Up
      2. 8.4.2 Operating Modes
        1. 8.4.2.1 Single-Shot Mode
        2. 8.4.2.2 Continuous-Conversion Mode
      3. 8.4.3 Duty Cycling For Low Power
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
        1. 8.5.1.1 I2C Address Selection
        2. 8.5.1.2 I2C General Call
        3. 8.5.1.3 I2C Speed Modes
      2. 8.5.2 Target Mode Operations
        1. 8.5.2.1 Receive Mode
        2. 8.5.2.2 Transmit Mode
      3. 8.5.3 Writing To and Reading From the Registers
      4. 8.5.4 Data Format
    6. 8.6 Register Map
      1. 8.6.1 Address Pointer Register (address = N/A) [reset = N/A]
      2. 8.6.2 Conversion Register (P[1:0] = 00b) [reset = 0000h]
      3. 8.6.3 Config Register (P[1:0] = 01b) [reset = 8583h]
      4. 8.6.4 Lo_thresh (P[1:0] = 10b) [reset = 8000h] and Hi_thresh (P[1:0] = 11b) [reset = 7FFFh] Registers
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Connections
      2. 9.1.2 Single-Ended Inputs
      3. 9.1.3 Input Protection
      4. 9.1.4 Unused Inputs and Outputs
      5. 9.1.5 Analog Input Filtering
      6. 9.1.6 Connecting Multiple Devices
      7. 9.1.7 Quick-Start Guide
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Shunt Resistor Considerations
        2. 9.2.2.2 Operational Amplifier Considerations
        3. 9.2.2.3 ADC Input Common-Mode Considerations
        4. 9.2.2.4 Resistor (R1, R2, R3, R4) Considerations
        5. 9.2.2.5 Noise and Input Impedance Considerations
        6. 9.2.2.6 First-Order RC Filter Considerations
        7. 9.2.2.7 Circuit Implementation
        8. 9.2.2.8 Results Summary
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-Supply Sequencing
      2. 9.3.2 Power-Supply Decoupling
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Revision History

Changes from Revision D (January 2018) to Revision E (December 2022)

  • I2C に言及している場合、すべての旧式の用語をコントローラおよびターゲットに変更Go
  • 「特長」セクションに機能安全対応の箇条書き項目およびデバイス・ファミリ情報を追加し、ESD分類情報を「特長」セクションから「ESD定格」表に移動Go
  • 「アプリケーション」セクションのアプリケーションを変更Go
  • NKS (UQFN) パッケージおよび「製品情報」表を追加し、「概要」セクションの最後のパラグラフを削除Go
  • Added NKS package to Pin Configuration and Functions section and changed Pin Functions tableGo
  • Changed free-air to ambient in condition statement of Absolute Maximum Ratings tableGo
  • Added ESD classification levels and NKS package to ESD Ratings table.Go
  • Added NKS package to Thermal Information table.Go
  • Changed unit of common-mode input impedance (FSR = ±0.512 V, FSR = ±0.256 V) parameter from MΩ to kΩ in Electrical Characteristics tableGo
  • Changed Y-axis unit of Total Error vs Input Signal figure from μV to mV in Typical Characteristics sectionGo
  • Added additional information to last paragraph in Multiplexer sectionGo
  • Added additional information to Voltage Reference sectionGo
  • Moved Figure 8-7 from Conversion Ready Pin section to Digital Comparator section.Go
  • Corrected cross reference to Timing Diagram for Reading From the ADS111x-Q1 figure in Writing to and Reading From the Registers sectionGo
  • Changed bit setting notation from hexadecimal to binary where beneficial for clarity throughout Register Map sectionGo
  • Added Config Register - ADS1113-Q1 , Config Register - ADS1114-Q1 , and Config Register - ADS1115-Q1 and changed bit descriptions in Config Register Field Descriptions table in Config Register sectionGo
  • Changed first paragraph in Lo-threh and Hi_thresh Registers sectionGo
  • Changed Unused Inputs and Outputs sectionGo
  • Changed statement above Equation 9 in Detailed Design Procedure section.Go
  • Added layout example for NKS package in Layout Example sectionGo

Changes from Revision C (December 2016) to Revision D (January 2018)

  • Changed Digital input voltage max value from VDD + 0.3 V to 5.5 V in Absolute Maximum Ratings tableGo
  • Deleted values for ADS111xB-Q1 device in Thermal Information table; thermal values now same for all devicesGo
  • Added "over temperature" to Offset drift parameter for clarityGo
  • Added Long-term Offset drift parameter in Electrical Characteristics tableGo
  • Added "over temperature" to Gain drift parameter for clarityGo
  • Added Long-term gain drift parameter in Electrical Characteristics tableGo
  • Changed VIH parameter max value from VDD to 5.5 V in Electrical Characteristics tableGo
  • Added Output Data Rate and Conversion Time section for clarity.Go
  • Changed Conversion Ready Pin section for clarityGo
  • Changed Figure 28, ALERT Pin Timing Diagram for clarityGo
  • Changed Typical Connections of the ADS1115-Q1 figure for clarityGo
  • Changed the resistor values in Figure 43, Basic Hardware Configuration, from 10 Ω to 10 kΩGo