JAJSLQ5C April 2021 – September 2022 ADS127L11
PRODUCTION DATA
At power-up and after reset, the ADC defaults to internal oscillator mode (CLK_SEL bit = 0b). The frequency of the internal oscillator automatically scales to high-speed or low-speed operation. Because of the clock jitter associated with the internal oscillator, the internal oscillator is only recommended for dc signal measurements. AC signal measurements are not recommended when using the internal oscillator.
When changing the clock mode from an external clock to the internal oscillator, maintain the external clock for at least four cycles after completing the SPI register write command used to change the clock mode. After the clock mode changes, the ADC ignores control inputs (the START and RESET pins) for a period of 150 μs to allow time for the internal oscillator to stabilize.