JAJSLQ5C April 2021 – September 2022 ADS127L11
PRODUCTION DATA
Communication through the serial interface is based on the concept of frames. A frame consists of a prescribed number of SCLKs required to shift in or shift out data. A frame is started by taking CS low and is ended by taking CS high. When CS is taken high, the device interprets the last 16 bits (or 24 bits in CRC mode) of input data regardless of the amount of data shifted into the device. In typical use, the input frame is sized to match the output frame by padding the frame with leading zeros if needed. However, if not transmitting and receiving data in full-duplex mode, the input data frame can be the minimum size of 16 bits (or 24 bits in CRC mode). The output frame size, as given in Table 8-12, depends on the programmed data resolution (16 or 24 bits) and optional STATUS header and CRC bytes. After the ADC is powered up or reset, the default output frame size is 24 bits. In 3-wire SPI mode, the input frame must match the size of the output frame for the SPI to remain synchronized.
RESOLUTION | STATUS BYTE | CRC BYTE | FRAME SIZE |
---|---|---|---|
24 bit | No | No | 24 bit |
24 bit | No | Yes | 32 bit |
24 bit | Yes | No | 32 bit |
24 bit | Yes | Yes | 40 bit |
16 bit | No | No | 16 bit |
16 bit | No | Yes | 24 bit |
16 bit | Yes | No | 24 bit |
16 bit | Yes | Yes | 32 bit |