JAJSOX0A March 2024 – June 2024 ADS127L18
ADVANCE INFORMATION
The write register command writes register data. The write register operation is performed in a single frame. The first byte of the command is the base value (80h) added to the 7-bit register address. The second byte of the command is the register data. When the SPI out-of-range address feature is enabled, the write operation is rejected and the ADDR_ERR flag is set in the STATUS byte. The register data format is most-significant-bit first.
Figure 7-46 shows an example of writing register data with the SPI STATUS and CRC bytes disabled, resulting in a two-byte command operation. If the previous operation was a write register command, the first output byte is the echo of the previously written register data. Otherwise, the first output byte is the register data from the register read operation.
Figure 7-47 shows an example of a write register operation with the SPI STATUS and CRC bytes enabled. In this example, the frame is three bytes long because the STATUS and CRC bytes are enabled. If the previous operation was a write register command, the first output byte is the echo of the previously received register data. If a CRC error occurred in the previous frame, the previous write operation is rejected. The echo byte is then inverted, and the SPI_FLAG bit is set in the STATUS byte. Further register write operations are blocked until the CRC_FLAG in the STATUS register is reset. If the previous operation is a register read, the first output byte is register data.