JAJSHV5B June 2017 – August 2019 ADS1287
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The ADC has two modes of operation: high resolution and low power. High-resolution mode provides the lowest noise (maximum SNR performance), whereas low-power mode offers lower power consumption at the expense of increased noise. Table 13 summarizes noise performance, power consumption, and associated register setting for each mode. The three register bits, located in the ID/CFG and CONFIG0 registers, must all be set to the same value (all 0s or all 1s).
REGISTER BITS MODE2, MODE1, MODE0 | OPERATIONAL MODE | SNR (dB)(1) | POWER (mW) |
---|---|---|---|
111 | High resolution | 113 | 4.5 |
000 | Low power | 110 | 2.4 |