JAJSIY6C
December 2011 – April 2020
ADS1291
,
ADS1292
,
ADS1292R
PRODUCTION DATA.
1
特長
2
アプリケーション
ブロック概略図
3
概要
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Parameter Measurement Information
7.1
Noise Measurements
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
EMI Filter
8.3.2
Input Multiplexer
8.3.2.1
Device Noise Measurements
8.3.2.2
Test Signals (TestP and TestN)
8.3.2.3
Auxiliary Differential Input (RESP_MODN/IN3N, RESP_MODN/IN3P)
8.3.2.4
Temperature Sensor (TEMPP, TEMPN)
8.3.2.5
Supply Measurements (MVDDP, MVDDN)
8.3.2.6
Lead-Off Excitation Signals (LoffP, LoffN)
8.3.2.7
Auxiliary Single-Ended Input
8.3.3
Analog Input
8.3.4
PGA Settings and Input Range
8.3.4.1
Input Common-Mode Range
8.3.4.2
Input Differential Dynamic Range
8.3.4.3
ADC ΔΣ Modulator
8.3.5
Digital Decimation Filter
8.3.5.1
Sinc Filter Stage (sinx / x)
8.3.6
Reference
8.3.7
Clock
8.3.8
Data Format
8.3.9
Multiple Device Configuration
8.3.9.1
Standard Mode
8.3.10
ECG-Specific Functions
8.3.10.1
Input Multiplexer (Rerouting the Right Leg Drive Signal)
8.3.10.1.1
Input Multiplexer (Measuring the Right Leg Drive Signal)
8.3.10.2
Lead-Off Detection
8.3.10.2.1
DC Lead-Off
8.3.10.2.2
AC Lead-Off
8.3.10.2.3
RLD Lead-Off
8.3.10.2.4
Right Leg Drive (RLD DC Bias Circuit)
8.3.10.2.4.1
RLD Configuration With Multiple Devices
8.3.10.3
PACE Detect
8.3.10.4
Respiration
8.3.10.4.1
Internal Respiration Circuitry With Internal Clock (ADS1292R)
8.3.10.4.2
Internal Respiration Circuitry With External Clock (ADS1292R)
8.3.11
Setting the Device for Basic Data Capture
8.3.11.1
Lead-Off
8.4
Device Functional Modes
8.5
Programming
8.5.1
SPI Interface
8.5.1.1
Chip Select (CS)
8.5.1.2
Serial Clock (SCLK)
8.5.1.3
Data Input (DIN)
8.5.1.4
Data Output (DOUT)
8.5.1.5
Data Retrieval
8.5.1.6
Data Ready (DRDY)
8.5.1.7
GPIO
8.5.1.8
Power-Down and Reset (PWDN/RESET)
8.5.1.9
START
8.5.1.10
Settling Time
8.5.1.11
Continuous Mode
8.5.1.12
Single-Shot Mode
8.5.2
SPI Command Definitions
8.5.2.1
WAKEUP: Exit STANDBY Mode
8.5.2.2
STANDBY: Enter STANDBY Mode
8.5.2.3
RESET: Reset Registers to Default Values
8.5.2.4
START: Start Conversions
8.5.2.5
STOP: Stop Conversions
8.5.2.6
OFFSETCAL: Channel Offset Calibration
8.5.2.7
RDATAC: Read Data Continuous
8.5.2.8
SDATAC: Stop Read Data Continuous
8.5.2.9
RDATA: Read Data
8.5.2.10
Sending Multi-Byte Commands
8.5.2.11
RREG: Read From Register
8.5.2.12
WREG: Write to Register
8.6
Register Maps
8.6.1
User Register Description
8.6.1.1
ID: ID Control Register (Factory-Programmed, Read-Only) (address = 00h)
Table 17.
ID: ID Control Register (Factory-Programmed, Read-Only) Field Descriptions
8.6.1.2
CONFIG1: Configuration Register 1 (address = 01h)
Table 18.
CONFIG1: Configuration Register 1 Field Descriptions
8.6.1.3
CONFIG2: Configuration Register 2 (address = 02h)
Table 19.
CONFIG2: Configuration Register 2 Field Descriptions
8.6.1.4
LOFF: Lead-Off Control Register (address = 03h)
Table 20.
LOFF: Lead-Off Control Register Field Descriptions
8.6.1.5
CH1SET: Channel 1 Settings (address = 04h)
Table 21.
CH1SET: Channel 1 Settings Field Descriptions
8.6.1.6
CH2SET: Channel 2 Settings (address = 05h)
Table 22.
CH2SET: Channel 2 Settings Field Descriptions
8.6.1.7
RLD_SENS: Right Leg Drive Sense Selection (address = 06h)
Table 23.
RLD_SENS: Right Leg Drive Sense Selection Field Descriptions
8.6.1.8
LOFF_SENS: Lead-Off Sense Selection (address = 07h)
Table 24.
LOFF_SENS: Lead-Off Sense Selection Field Descriptions
8.6.1.9
LOFF_STAT: Lead-Off Status (address = 08h)
Table 25.
LOFF_STAT: Lead-Off Status Field Descriptions
8.6.1.10
RESP1: Respiration Control Register 1 (address = 09h)
Table 26.
RESP1: Respiration Control Register 1 Field Descriptions
8.6.1.11
RESP2: Respiration Control Register 2 (address = 0Ah)
Table 27.
RESP2: Respiration Control Register 2 Field Descriptions
8.6.1.12
GPIO: General-Purpose I/O Register (address = 0Bh)
Table 28.
GPIO: General-Purpose I/O Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
Power-Up Sequencing
11
Layout
11.1
Layout Guidelines
11.1.1
PCB Layout
11.1.1.1
Power Supplies and Grounding
11.1.1.1.1
Connecting the Device to Unipolar (+3 V or +1.8 V) Supplies
11.1.1.1.2
Connecting the Device to Bipolar (±1.5 V or 1.8 V) Supplies
11.1.1.2
Shielding Analog Signal Paths
11.2
Layout Example
12
デバイスおよびドキュメントのサポート
12.1
関連リンク
12.2
ドキュメントの更新通知を受け取る方法
12.3
サポート・リソース
12.4
商標
12.5
静電気放電に関する注意事項
12.6
Glossary
13
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PBS|32
MPQF027A
RSM|32
MPQF195B
サーマルパッド・メカニカル・データ
PBS|32
QFND381
RSM|32
QFND112H
発注情報
jajsiy6c_oa
jajsiy6c_pm
8.2
Functional Block Diagram