The ADS1299-4, ADS1299-6, and ADS1299 devices are a family of four-, six-, and eight-channel, low-noise, 24-bit, simultaneous-sampling delta-sigma (ΔΣ) analog-to-digital converters (ADCs) with a built-in programmable gain amplifier (PGA), internal reference, and an onboard oscillator. The ADS1299-x incorporates all commonly-required features for extracranial electroencephalogram (EEG) and electrocardiography (ECG) applications. With its high levels of integration and exceptional performance, the ADS1299-x enables the creation of scalable medical instrumentation systems at significantly reduced size, power, and overall cost.
The ADS1299-x has a flexible input multiplexer per channel that can be independently connected to the internally-generated signals for test, temperature, and lead-off detection. Additionally, any configuration of input channels can be selected for derivation of the patient bias output signal. Optional SRB pins are available to route a common signal to multiple inputs for a referential montage configuration. The ADS1299-x operates at data rates from 250 SPS to 16 kSPS. Lead-off detection can be implemented internal to the device using an excitation current sink or source.
Multiple ADS1299-4, ADS1299-6, or ADS1299 devices can be cascaded in high channel count systems in a daisy-chain configuration. The ADS1299-x is offered in a TQFP-64 package specified from –40°C to +85°C.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
ADS1299-x | TQFP (64) | 10.00 mm × 10.00 mm |
Changes from B Revision (October 2016) to C Revision
Changes from A Revision (August 2012) to B Revision
Changes from * Revision (July 2012) to A Revision
PRODUCT | PACKAGE OPTIONS | OPERATING TEMPERATURE RANGE | CHANNELS | ADC RESOLUTION | MAXIMUM SAMPLING RATE |
---|---|---|---|---|---|
ADS1299-4 | TQFP-64 | –40°C to +85°C | 4 | 24 | 16 kSPS |
ADS1299-6 | TQFP-64 | –40°C to +85°C | 6 | 24 | 16 kSPS |
ADS1299 | TQFP-64 | –40°C to +85°C | 8 | 24 | 16 kSPS |
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AVDD | 19, 21, 22, 56, 59 | Supply | Analog supply. Connect a 1-μF capacitor to AVSS. |
59 | Supply | Charge pump analog supply. Connect a 1-μF capacitor to AVSS, pin 58. | |
AVDD1 | 54 | Supply | Analog supply. Connect a 1-μF capacitor to AVSS1. |
AVSS | 20, 23, 32, 57 | Supply | Analog ground |
58 | Supply | Analog ground for charge pump | |
AVSS1 | 53 | Supply | Analog ground |
BIASIN | 62 | Analog input | Bias drive input to MUX |
BIASINV | 61 | Analog input/output | Bias drive inverting input |
BIASOUT | 63 | Analog output | Bias drive output |
BIASREF | 60 | Analog input | Bias drive noninverting input |
CS | 39 | Digital input | Chip select, active low |
CLK | 37 | Digital input | Master clock input |
CLKSEL | 52 | Digital input | Master clock select(2) |
DAISY_IN | 41 | Digital input | Daisy-chain input |
DGND | 33, 49, 51 | Supply | Digital ground |
DIN | 34 | Digital input | Serial data input |
DOUT | 43 | Digital output | Serial data output |
DRDY | 47 | Digital output | Data ready, active low |
DVDD | 48, 50 | Supply | Digital power supply. Connect a 1-μF capacitor to DGND. |
GPIO1 | 42 | Digital input/output | General-purpose input/output pin 1. Connect to DGND with a ≥10-kΩ resistor if unused. |
GPIO2 | 44 | Digital input/output | General-purpose input/output pin 2. Connect to DGND with a ≥10-kΩ resistor if unused. |
GPIO3 | 45 | Digital input/output | General-purpose input/output pin 3. Connect to DGND with a ≥10-kΩ resistor if unused. |
GPIO4 | 46 | Digital input/output | General-purpose input/output pin 4. Connect to DGND with a ≥10-kΩ resistor if unused. |
IN1N | 15 | Analog input | Differential analog negative input 1(1) |
IN1P | 16 | Analog input | Differential analog positive input 1(1) |
IN2N | 13 | Analog input | Differential analog negative input 2(1) |
IN2P | 14 | Analog input | Differential analog positive input 2(1) |
IN3N | 11 | Analog input | Differential analog negative input 3(1) |
IN3P | 12 | Analog input | Differential analog positive input 3(1) |
IN4N | 9 | Analog input | Differential analog negative input 4(1) |
IN4P | 10 | Analog input | Differential analog positive input 4(1) |
IN5N | 7 | Analog input | Differential analog negative input 5(1) (ADS1299-6 and ADS1299 only) |
IN5P | 8 | Analog input | Differential analog positive input 5(1) (ADS1299-6 and ADS1299 only) |
IN6N | 5 | Analog input | Differential analog negative input 6(1) (ADS1299-6 and ADS1299 only) |
IN6P | 6 | Analog input | Differential analog positive input 6(1) (ADS1299-6 and ADS1299 only) |
IN7N | 3 | Analog input | Differential analog negative input 7(1) (ADS1299 only) |
IN7P | 4 | Analog input | Differential analog positive input 7(1) (ADS1299 only) |
IN8N | 1 | Analog input | Differential analog negative input 8(1) (ADS1299 only) |
IN8P | 2 | Analog input | Differential analog positive input 8(1) (ADS1299 only) |
NC | 27, 29 | — | No connection, leave as open circuit |
Reserved | 64 | Analog output | Reserved for future use, leave as open circuit |
RESET | 36 | Digital input | System reset, active low |
RESV1 | 31 | Digital input | Reserved for future use, connect directly to DGND |
SCLK | 40 | Digital input | Serial clock input |
SRB1 | 17 | Analog input/output | Patient stimulus, reference, and bias signal 1 |
SRB2 | 18 | Analog input/output | Patient stimulus, reference, and bias signal 2 |
START | 38 | Digital input | Synchronization signal to start or restart a conversion |
PWDN | 35 | Digital input | Power-down, active low |
VCAP1 | 28 | Analog output | Analog bypass capacitor pin. Connect a 100-μF capacitor to AVSS. |
VCAP2 | 30 | Analog output | Analog bypass capacitor pin. Connect a 1-μF capacitor to AVSS. |
VCAP3 | 55 | Analog output | Analog bypass capacitor pin. Connect a parallel combination of 1-μF and 0.1-μF capacitors to AVSS. |
VCAP4 | 26 | Analog output | Analog bypass capacitor pin. Connect a 1-μF capacitor to AVSS. |
VREFN | 25 | Analog input | Negative analog reference voltage. |
VREFP | 24 | Analog input/output | Positive analog reference voltage. Connect a minimum 10-μF capacitor to VREFN. |