SBAS578A May   2012  – January 2016 ADS4128

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Electrical Characteristics: General
    7. 7.7  Digital Characteristics
    8. 7.8  Timing Requirements: LVDS and CMOS Modes
    9. 7.9  Reset Timing Requirements
    10. 7.10 Typical Characteristics
    11. 7.11 Typical Characteristics: Contour
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Migrating From the ADS6149 Family
      2. 8.3.2 Digital Functions and Low-Latency Mode
      3. 8.3.3 Gain for SFDR and SNR Trade-Off
      4. 8.3.4 Offset Correction
      5. 8.3.5 Power Down
        1. 8.3.5.1 Global Power-Down
        2. 8.3.5.2 Standby
        3. 8.3.5.3 Output Buffer Disable
        4. 8.3.5.4 Input Clock Stop
      6. 8.3.6 Power-Supply Sequence
      7. 8.3.7 Output Data Format
    4. 8.4 Device Functional Modes
      1. 8.4.1 Output Interface Modes
        1. 8.4.1.1 Output Interface
        2. 8.4.1.2 DDR LVDS Outputs
        3. 8.4.1.3 LVDS Output Data and Clock Buffers
        4. 8.4.1.4 Parallel CMOS Interface
        5. 8.4.1.5 CMOS Interface Power Dissipation
        6. 8.4.1.6 Input Over-Voltage Indication (OVR Pin)
    5. 8.5 Programming
      1. 8.5.1 Serial Register Readout
      2. 8.5.2 Serial Interface
        1. 8.5.2.1 Register Initialization
    6. 8.6 Register Maps
      1. 8.6.1 Serial Interface Register Map
      2. 8.6.2 Register Description
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Analog Input
      2. 9.1.2 Driving Circuit
        1. 9.1.2.1 Drive Circuit Requirements
      3. 9.1.3 Analog Input
        1. 9.1.3.1 Input Common-Mode
      4. 9.1.4 Clock Input
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Analog Input
        2. 9.2.2.2 Clock Driver
        3. 9.2.2.3 Digital Interface
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Sharing DRVDD and AVDD Supplies
    2. 10.2 Using DC/DC Power Supplies
    3. 10.3 Power Supply Bypassing
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Grounding
      2. 11.1.2 Supply Decoupling
      3. 11.1.3 Exposed Pad
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Revision History

Changes from * Revision (May 2012) to A Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.Go