SLAS611C October   2009  – January 2016 ADS5400

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Interleaving Adjustments
    7. 6.7 Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Configuration
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Analog Input Over-Range Recovery Error
      4. 7.3.4  Clock Inputs
      5. 7.3.5  Over Range
      6. 7.3.6  Data Scramble
      7. 7.3.7  Test Patterns
      8. 7.3.8  Die Identification and Revision
      9. 7.3.9  Die Temperature Sensor
      10. 7.3.10 Interleaving
        1. 7.3.10.1 Gain Adjustment
        2. 7.3.10.2 Offset Adjustment
        3. 7.3.10.3 Input Clock Coarse Phase Adjustment
        4. 7.3.10.4 Input Clock Fine Phase Adjustment
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Bus and Clock Options
      2. 7.4.2 Reset and Synchronization
      3. 7.4.3 LVDS
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
    6. 7.6 Register Maps
      1. 7.6.1 Serial Register Map
      2. 7.6.2 Description of Serial Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Clocking Source for ADS5400
        2. 8.2.2.2 Amplifier Selection
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 PowerPAD™ Package
      1. 10.3.1 Assembly Process
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11 Device and Documentation Support

11.1 Device Support

11.1.1 Device Nomenclature

    Analog Bandwidth The analog input frequency at which the power of the fundamental is reduced by 3 dB with respect to the low-frequency value
    Aperture Delay The delay in time between the rising edge of the input sampling clock and the actual time at which the sampling occurs
    Aperture Uncertainty (Jitter) The sample-to-sample variation in aperture delay
    Clock Pulse Duration/Duty Cycle The duty cycle of a clock signal is the ratio of the time the clock signal remains at a logic high (clock pulse duration) to the period of the clock signal, expressed as a percentage.
    Differential Nonlinearity (DNL) An ideal ADC exhibits code transitions at analog input values spaced exactly 1 LSB apart. DNL is the deviation of any single step from this ideal value, measured in units of LSB.
    Common-Mode Rejection Ratio (CMRR)

    CMRR measures the ability to reject signals that are presented to both analog inputs simultaneously. The injected common-mode frequency level is translated into dBFS, the spur in the output FFT is measured in dBFS, and the difference is the CMRR in dB.

    Effective Number of Bits (ENOB) ENOB is a measure in units of bits of a converter's performance as compared to the theoretical limit based on quantization noise
    Equation 7. ENOB = (SINAD – 1.76)/ 6.02
    Gain Error Gain error is the deviation of the ADC actual input full-scale range from its ideal value, given as a percentage of the ideal input full-scale range.
    Integral Nonlinearity (INL) INL is the deviation of the ADC transfer function from a best-fit line determined by a least-squares curve fit of that transfer function. The INL at each analog input value is the difference between the actual transfer function and this best-fit line, measured in units of LSB.
    Offset Error Offset error is the deviation of output code from mid-code when both inputs are tied to common-mode.
    Power-Supply Rejection Ratio (PSRR) PSRR is a measure of the ability to reject frequencies present on the power supply. The injected frequency level is translated into dBFS, the spur in the output FFT is measured in dBFS, and the difference is the PSRR in dB. The measurement calibrates out the benefit of the board supply decoupling capacitors.
    Signal-to-Noise Ratio (SNR) SNR is the ratio of the power of the fundamental (PS) to the noise floor power (PN), excluding the power at DC and in the first five harmonics
    Equation 8. ADS5400 q1_snr_las515.gif

    SNR is either given in units of dBc (dB to carrier) when the absolute power of the fundamental is used as the reference, or dBFS (dB to full scale) when the power of the fundamental is extrapolated to the converter’s full-scale range.

    Signal-to-Noise and Distortion (SINAD) SINAD is the ratio of the power of the fundamental (PS) to the power of all the other spectral components including noise (PN) and distortion (PD), but excluding DC.
    Equation 9. ADS5400 q2_sinad_las515.gif

    SINAD is either given in units of dBc (dB to carrier) when the absolute power of the fundamental is used as the reference, or dBFS (dB to full scale) when the power of the fundamental is extrapolated to the converter’s full-scale range.

    Temperature Drift Temperature drift (with respect to gain error and offset error) specifies the change from the value at the nominal temperature to the value at TMIN or TMAX. It is computed as the maximum variation the parameters over the whole temperature range divided by TMIN – TMAX.
    Total Harmonic Distortion (THD) THD is the ratio of the power of the fundamental (PS) to the power of the first five harmonics (PD).
    Equation 10. ADS5400 q3_thd_las515.gif

    THD is typically given in units of dBc (dB to carrier).

    Two-Tone Intermodulation Distortion (IMD3) IMD3 is the ratio of the power of the fundamental (at frequencies f1, f2) to the power of the worst spectral component at either frequency 2f1 – f2 or 2f2 – f1). IMD3 is given in units of either dBc (dB to carrier) when the absolute power of the fundamental is used as the reference, or dBFS (dB to full scale) when the power of the fundamental is extrapolated to the converter’s full-scale range.

11.2 Documentation Support

11.2.1 Related Documentation

For related documentation see the following:

  • ADS5400 EVM User Guide, SLAU293
  • Clocking High-Speed Data Converters, SLYT075
  • PowerPAD Made Easy, SLMA004
  • PowerPAD Thermally Enhanced Package, SLMA002

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.