JAJSGS3B January 2019 – July 2022 ADS8353-Q1
PRODUCTION DATA
Best practice is for the distortion from the input driver to be at least 10 dB less than the ADC distortion. The distortion resulting from variation in the common-mode signal is eliminated by using the amplifier in an inverting gain configuration that establishes a fixed common-mode level for the circuit. This configuration also eliminates the requirement of rail-to-rail swing at the amplifier input. The low-power OPA320-Q1, used as an input driver, provides exceptional ac performance because of its extremely low-distortion and high-bandwidth specifications. In addition, the components of the antialiasing filter are such that the noise from the front-end circuit is kept low without adding distortion to the input signal.
The application circuit illustrated in Figure 8-2 is optimized to achieve the lowest distortion and lowest noise for a
10-kHz input signal fed to the ADS8353-Q1 operating at full throughput with the default 32-CLK, dual-SDO interface mode. The input signal is processed through a high-bandwidth, low-distortion amplifier in an inverting gain configuration and a low-pass RC filter before being fed into the device.
Figure 8-3 illustrates the reference driver circuit when operation with an external reference is desired. The reference voltage is generated by the high-precision, low-noise REF34-Q1 circuit. The output broadband noise of the reference is heavily filtered by a low-pass filter with a 3-dB cutoff frequency of 160 Hz. The decoupling capacitor on each reference pin is selected to be 10 µF. The low output impedance, low noise, and fast settling time make the OPA2320-Q1 a good choice for driving this high capacitive load.