SBAS531D December   2010  – February 2016 ADS8555

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Serial Interface Timing Requirements
    7. 6.7 Parallel Interface Timing Requirements (Read Access)
    8. 6.8 Parallel Interface Timing Requirements (Write Access)
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog
        1. 7.3.1.1 Analog Inputs
        2. 7.3.1.2 Analog-to-Digital Converter (ADC)
        3. 7.3.1.3 Conversion Clock
        4. 7.3.1.4 CONVST_x
        5. 7.3.1.5 BUSY/INT
        6. 7.3.1.6 Reference
      2. 7.3.2 Digital
        1. 7.3.2.1 Device Configuration
        2. 7.3.2.2 Parallel Interface
        3. 7.3.2.3 Serial Interface
        4. 7.3.2.4 Output Data Format
    4. 7.4 Device Functional Modes
      1. 7.4.1 Hardware Mode
      2. 7.4.2 Software Mode
      3. 7.4.3 Daisy-Chain Mode (In Serial Mode Only)
      4. 7.4.4 Sequential Mode (In Software Mode With External Conversion Clock Only)
      5. 7.4.5 Reset and Power-Down Modes
    5. 7.5 Register Maps
      1. 7.5.1 Control Register (CR); Default Value = 0x000003FF
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Measurement of Electrical Variables in a 3-Phase Power System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Six SAR ADCs Grouped in Three Pairs
  • Maximum Data Rate Per Channel With Internal Clock and Reference:
    630 kSPS (Parallel) or 450 kSPS (Serial)
  • Maximum Data Rate Per Channel With External Clock and Reference:
    800 kSPS (Parallel) or 500 kSPS (Serial)
  • Pin-Selectable or Programmable Input Voltage Ranges: Up to ±12 V
  • Excellent AC Performance:
    91.5-dB SNR, –94-dB THD
  • Programmable and Buffered Internal Reference: 0.5 V to 2.5 V and 0.5 V to 3 V
  • Comprehensive Power-Down Modes:
    • Deep Power Down (Standby Mode)
    • Auto-Nap Power Down
  • Selectable Parallel or Serial Interface
  • Operating Temperature Range: –40°C to 125°C
  • LQFP-64 Package

2 Applications

  • Power Quality Measurements
  • Protection Relays
  • Multi-Axis Motor Controls
  • Programmable Logic Controllers
  • Industrial Data Acquisition

    • SNR vs Temperature

    ADS8555 tc_snr-tmp_bas531.gif

3 Description

The ADS8555 device contains six low-power, 16-bit, successive approximation register (SAR)-based analog-to-digital converters (ADCs) with true bipolar inputs. Each channel contains a sample-and-hold circuit that allows simultaneous high-speed multi-channel signal acquisition.

The ADS8555 device supports data rates of up to 630 kSPS in parallel interface mode or up to 450 kSPS if the serial interface is used. The bus width of the parallel interface can be set to eight or 16 bits. In serial mode, up to three output channels can be activated.

The ADS8555 device is specified over the extended industrial temperature range of –40°C to 125°C and is available in an LQFP-64 package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
ADS8555 LQFP (64) 10.00 mm × 10.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

ADS8555 pg1_fbd_bas531.gif

4 Revision History

Changes from C Revision (October 2015) to D Revision

  • Changed Figure 36: changed capacitor values from 820 nF to 820 pF Go

Changes from B Revision (February 2011) to C Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go

Changes from A Revision (January 2011) to B Revision

  • Changed description of pin 18 in Pin Descriptions tableGo
  • Added clarification of INT in BUSY/INT sectionGo
  • Updated Table 4Go
  • Changed bit C20 in Table 5Go

Changes from * Revision (December 2010) to A Revision

  • Changed description of CONVST_C, CONVST_B, and CONVST_A pins in Pin Descriptions tableGo
  • Changed description of CONVST_x sectionGo
  • Changed first paragraph of BUSY/INT sectionGo