JAJSCA2B June 2016 – January 2018 ADS8910B , ADS8912B , ADS8914B
PRODUCTION DATA.
The devices have two separate power supplies: RVDD and DVDD. The internal reference buffer and the internal LDO operate on RVDD. The ADC core operates on the LDO output (available on the DECAP pins). DVDD is used for the interface circuits. RVDD and DVDD can be independently set to any value within their permissible ranges. During normal operation, if RVDD supply drops below the RVDD minimum specification, ramp the RVDD supply down to ≤ 0.7 V before power-up. During power-up, RVDD must rise monotonically to the recommended minimum operating voltage.
The RVDD supply voltage value defines the permissible range for the external reference voltage VREF on REFIN pin as:
Place a 10-µF decoupling capacitor between the RVDD and GND pins, and between the DVDD and GND pins, as shown in Figure 118. Use a minimum 1-µF decoupling capacitor between the DECAP pins and the GND pin.