JAJSTM8 April 2024 AFE20408
PRODUCTION DATA
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | FSDO | SDO_EN | |||||
R-0h | R/W-0h | R/W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
1 | FSDO | R/W | 0h | Enables
faster SPI bus speeds by sending the SDO data out
one SCLK half-cycle earlier (FSDO mode). Ignored
when SDO_EN = 0 0 = FSDO disabled, SDO drives MSB when chip select goes low and then updates on each SCLK rising edge (opposite edge of SDI latching edge) 1 = FSDO enabled, SDO drives MSB when chip select goes low and then updates on each SCLK falling edge (same edge as SDI latching edge) |
0 | SDO_EN | R/W | 0h | SDO
Enable. SDO is enabled for read and write
operations whenever the SPI
CS pin is low. SDO is always
disabled in I2C mode regardless of this
bit setting. 0 = SDO disabled 1 = SDO enabled during read/write operations |