JAJSLP2A august 2021 – july 2023 AFE439A2 , AFE539A4 , AFE639D2
PRODUCTION DATA
The AFEx39xx contain nonvolatile memory (NVM) bits. These memory bits are user programmable and erasable, and retain the set values in the absence of a power supply. All the register bits, shown in the highlighted gray cells in Table 7-23, can be stored in the NVM by setting NVM-PROG = 1 in the COMMON-TRIGGER register; this bit automatically resets. The NVM-BUSY bit in the GENERAL-STATUS register is set to 1 by the device when an NVM write or reload operation is ongoing. During this time, the device blocks all read and write operations to the device. The NVM-BUSY bit is set to 0 after the write or reload operation is complete; at this point, all read and write operations to the device are allowed. The default value for all the registers in the AFEx39xx is loaded from NVM as soon as a POR event is issued.
The AFEx39xx also reloads the registers with the current values stored in the NVM using the NVM-RELOAD bit in the COMMON-TRIGGER register. Set this bit to 1 for the device to start an NVM reload operation. After completion, the device automatically resets this bit to 0. During the NVM-RELOAD operation, the NVM-BUSY bit is set to 1.