In a mixed-signal system design, power supply and grounding design plays a significant role. The AFE5808A device distinguishes between two different grounds: AVSS (analog ground) and DVSS (digital ground). In most cases, it should be adequate to lay out the printed-circuit-board (PCB) to use a single ground plane for the AFE5808A device. Take care to partition this ground plane properly between various sections within the system to minimize interactions between analog and digital circuitry. Alternatively, the digital (DVDD) supply set consisting of the DVDD and DVSS pins can be placed on separate power and ground planes. For this configuration, the AVSS and DVSS grounds should be tied together at the power connector in a star layout. In addition, optical isolator or digital isolators, such as ISO7240, can separate the analog portion from the digital portion completely. Consequently they prevent digital noise to contaminate the analog portion. Table 2 lists the related circuit blocks for each power supply. Recommended power up sequence is shown in Figure 93.

10 µs < t1 < 50 ms, 10 µs < t2 < 50 ms, –10 ms < t3 < 10 ms, t4 > 10 ms, t5 > 100 ns, t6 > 100 ns, t7 > 10 ms, and t8 > 100 µs.
The AVDDx and DVDD power-on sequence does not matter as long as –10 ms < t3 < 10 ms. Similar considerations apply while shutting down the device.

Figure 93. Recommended Power-up Sequencing and Reset Timing

All bypassing and power supplies for the AFE5808A should be referenced to their corresponding ground planes. All supply pins should be bypassed with 0.1-µF ceramic chip capacitors (size 0603 or smaller). To minimize the lead and trace inductance, the capacitors should be located as close to the supply pins as possible. Where double-sided component mounting is allowed, these capacitors are best placed directly under the package. In addition, larger bipolar decoupling capacitors 2.2 µF to 10 µF, effective at lower frequencies) may also be used on the main supply pins. These components can be placed on the PCB in proximity (< 0.5 inch or 12.7 mm) to the AFE5808A device itself.

The AFE5808A device has a number of reference supplies needed to be bypassed, such as CM_BYP, and VHIGH. These pins should be bypassed with at least 1 µF; higher value capacitors can be used for better low-frequency noise suppression. For best results, choose low-inductance ceramic chip capacitors (size 0402, > 1 µF) and place them as close as possible to the device pins.

High-speed mixed signal devices are sensitive to various types of noise coupling. One primary source of noise is the switching noise from the serializer and the output buffer/drivers. For the AFE5808A device, the interaction between the analog and digital supplies within the device is ensured to keep to a minimal amount. The extent of noise coupled and transmitted from the digital and analog sections depends on the effective inductances of each of the supply and ground connections. Smaller effective inductance of the supply and ground pins leads to improved noise suppression. For this reason, multiple pins are used to connect each supply and ground sets. Take care to maintain low inductance properties throughout the design of the PCB layout by using proper planes and layer thickness.