SBAS735A August   2015  – May 2016 AFE58JD18

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Description (continued)
  6. 6Functional Block Diagram
  7. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Trademarks
    3. 7.3 Electrostatic Discharge Caution
    4. 7.4 Export Control Notice
    5. 7.5 Glossary
  8. 8Mechanical, Packaging, and Orderable Information
    1. 8.1 Tray Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

5 Description (continued)

The AFE58JD18 has a total of 16 channels, with each channel consisting of a voltage-controlled amplifier (VCA), a simultaneous sampling 14-bit and 12-bit analog-to-digital converter (ADC), and a continuous wave (CW) mixer. The VCA includes a low-noise amplifier (LNA), a voltage-controlled attenuator (VCAT), a programmable gain amplifier (PGA), and a low-pass filter (LPF). LNA gain is programmable and supports 250-mVPP to 1-VPP input signals and programmable active termination. The ultra-low noise VCAT provides an attenuation control range of 40 dB and improves overall low-gain SNR, which benefits harmonic and near-field imaging. The PGA provides gain options of 24 dB and 30 dB. In front of the ADC, an LPF can be configured at 10 MHz, 15 MHz, 20 MHz, 30 MHz, 35 MHz, or 50 MHz to support ultrasound applications with different frequencies.

The AFE58JD18 also integrates a low-power passive mixer and a low-noise summing amplifier to create an on-chip CWD beamformer. 16 selectable phase delays can be applied to each analog input signal. Furthermore, a unique third- and fifth-order harmonic suppression filter is implemented to enhance CW sensitivity

The high-performance, 14-bit ADC achieves 75-dBFS SNR. This ADC ensures excellent SNR at low-chain gain. The device can operate at maximum speeds of 65 MSPS and 80 MSPS, providing a 14-bit and a 12-bit output, respectively.

The ADC low-voltage differential signaling (LVDS) outputs enable a flexible system integration that is desirable for miniaturized systems.

The AFE58JD18 additionally includes an optional digital demodulator and JESD204B data packing blocks after the 12- or 14-bit ADC. The digital in-phase and quadrature (I/Q) demodulator with programmable fractional decimation filters accelerates computationally-intensive algorithms at low power. A JESD204B interface that runs up to 5 Gbps further reduces the circuit board routing challenges in high-channel count systems.

The AFE58JD18 also allows various power and noise combinations to be selected to optimize system performance. Therefore, the AFE58JD18 is a suitable ultrasound AFE solution for both high-end and portable systems.

The AFE58JD18 is available in a 15-mm × 15-mm NFBGA-289 package (ZBV package, S-PBGA-N289) and is specified for operation from –40°C to 85°C. The device pinout is also similar to the AFE5816 device family.