at TA = 25°C, PVDD = IOVDD
= 3.3 V, external or internal VREFIO = 1.25 V, RLOAD = 50 kΩ to GND,
CLOAD = 100 pF to GND, and digital inputs at IOVDD or GND (unless
otherwise noted)
Figure 5-34 Reference Voltage Temperature Drift![AFE78201 AFE88201 Multiple Temperature Cycle Hysteresis AFE78201 AFE88201 Multiple Temperature Cycle Hysteresis](/ods/images/SLASF44A/GUID-20221026-SS0I-FTM1-4FSK-SFJC564NGXNX-low.png)
|
–40°C to
+85°C cycles, 60 minutes per cycle, 30 units |
Figure 5-36 Multiple Temperature Cycle Hysteresis![AFE78201 AFE88201 Ambient Temperature Change Settling AFE78201 AFE88201 Ambient Temperature Change Settling](/ods/images/SLASF44A/GUID-20230414-SS0I-929J-RJRD-KCM6XC7VXV6L-low.png)
Two minutes after 25°C to
85°C temperature step, 30 units |
|
Figure 5-38 Ambient Temperature Change Settling
Figure 5-40 Reference Output Noise, 0.1 Hz to 10 Hz
Figure 5-42 Reference Source and Sink Current Capability
Figure 5-35 Reference Voltage Temperature Drift![AFE78201 AFE88201 Multiple Temperature Cycle Hysteresis AFE78201 AFE88201 Multiple Temperature Cycle Hysteresis](/ods/images/SLASF44A/GUID-20220927-SS0I-GR9J-DQ4V-8RBDPZZLN3DF-low.png)
–40°C to +85°C cycles, 60
minutes per cycle |
|
Figure 5-37 Multiple Temperature Cycle Hysteresis
Figure 5-39 Reference Voltage Long-Term Stability
Figure 5-41 Reference AC PSRR vs frequency
Figure 5-43 Initial Accuracy Distribution