JAJSOB7 データシート

JAJSOB7B march 2022 – june 2023 AFE7903

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

ABJ|400
- MCBG079C
ALK|400
- MPBGAU3B

サーマルパッド・メカニカル・データ

発注情報

6.12.13 TX Typical Characteristics at 4.9 GHz

Typical values at T_A = +25°C with nominal supplies. Unless otherwise noted, TX input data rate = 491.52 MSPS, f_DAC = 11796.48 MSPS, interleave mode, A_OUT = –1 dBFS, 1^st Nyquist zone output, Internal PLL, f_REF = 491.52 MSPS, 24x Interpolation, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated

Excluding PCB and cable losses, A_out = -0.5 dBFS, DSA = 0, 4.9 GHz matching

Figure 6-498 TX Full Scale vs RF Frequency and Channel at 11796.48 MSPS

Excluding PCB and cable losses, A_out = -0.5 dBFS, DSA = 0, 4.9 GHz matching

Figure 6-500 TX Full Scale vs RF Frequency and Channel at 8847.36 MSPS, Mixed Mode, 2nd Nyquist Zone

f_DAC=11796.48 MSPS, interleave mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 6-502 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 6-504 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 6-506 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 6-508 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)

Figure 6-510 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 6-512 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)

Figure 6-514 TX Uncalibrated Differential Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 6-516 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, P_OUT = –13 dBFS

Figure 6-518 TX Output Noise vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz, A_out = –13 dBFS.

Figure 6-520 TX NSD vs Output Frequency and Digital Amplitude at 4.9 GHz (DSA = 6 dB)

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9GHz, –13 dBFS each tone

Figure 6-522 TX IMD3 vs Tone Spacing and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9GHz, f_SPACING = 20 MHz

Figure 6-524 TX IMD3 vs Digital Level at 4.9 GHz

TM1.1, P_{OUT_RMS} = –13 dBFS

Figure 6-526 TX 100-MHz NR Output Spectrum at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 6-528 TX 20-MHz LTE alt-ACPR vs Digital Level at 4.9 GHz

Matching at 4.9 GHz, single carrier 100-MHz BW TM1.1 NR

Figure 6-530 TX 100-MHz NR alt-ACPR vs Digital Level at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 6-532 TX 20-MHz LTE alt-ACPR vs DSA at 4.9 GHz

Matching at 4.9 GHz, single carrier 100-MHz BW TM1.1 NR

Figure 6-534 TX 100-MHz NR alt-ACPR vs DSA at 4.9 GHz

Matching at 4.9 GHz, f_DAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency

Figure 6-536 TX HD3 vs Digital Amplitude and Output Frequency at 4.9 GHz

f_DAC = 11796.48MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses

Figure 6-538 TX Single Tone (–1 dBFS) Output Spectrum at 4.9 GHz (±300 MHz)

f_DAC = 11796.48MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses

Figure 6-540 TX Single Tone (–6 dBFS) Output Spectrum at 4.9 GHz (±300 MHz)

f_DAC = 11796.48MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses

Figure 6-542 TX Single Tone (–12 dBFS) Output Spectrum at 4.9 GHz (±300 MHz)

Excluding PCB and cable losses, A_out = -0.5 dBFS, DSA = 0, 4.9 GHz matching

Figure 6-499 TX Full Scale vs RF Frequency and Channel at 5898.24 MSPS, Mixed Mode, 2nd Nyquist Zone

f_DAC = 11796.48 MSPS, A_out = -0.5 dBFS, matching 4.9 GHz

Figure 6-501 TX Output Power vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 6-503 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 6-505 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 6-507 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 6-509 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)
Phase DNL spike may occur at any DSA setting.

Figure 6-511 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 6-513 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)

Figure 6-515 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 6-517 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz, A_out = –13 dBFS.

Figure 6-519 TX NSD vs Output Frequency and Digital Amplitude at 4.9 GHz (DSA = 0 dB)

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9GHz, -13 dBFS each tone

Figure 6-521 TX IMD3 vs DSA Setting at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9GHz, –13 dBFS each tone, worst channel

Figure 6-523 TX IMD3 vs Tone Spacing and Temperature at 4.9 GHz

TM1.1, P_{OUT_RMS} = –13 dBFS

Figure 6-525 TX 20-MHz LTE Output Spectrum at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 6-527 TX 20-MHz LTE ACPR vs Digital Level at 4.9 GHz

Matching at 4.9 GHz, single carrier 100-MHz BW TM1.1 NR

Figure 6-529 TX 100-MHz NR ACPR vs Digital Level at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 6-531 TX 20-MHz LTE ACPR vs DSA at 4.9 GHz

Matching at 4.9 GHz, single carrier 100-MHz BW TM1.1 NR

Figure 6-533 TX 100-MHz NR ACPR vs DSA at 4.9 GHz

Matching at 4.9 GHz, f_DAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency

Figure 6-535 TX HD2 vs Digital Amplitude and Output Frequency at 4.9 GHz

f_DAC = 11796.48MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = f_S/n ± f_OUT.

Figure 6-537 TX Single Tone (–1 dBFS) Output Spectrum at 4.9 GHz (0-f_DAC)

f_DAC = 11796.48MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = f_S/n ± f_OUT.

Figure 6-539 TX Single Tone (–6 dBFS) Output Spectrum at 4.9 GHz (0-f_DAC)

f_DAC = 11796.48MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = f_S/n ± f_OUT.

Figure 6-541 TX Single Tone (–12 dBFS) Output Spectrum at 4.9 GHz (0-f_DAC)

TM1.1, P_{OUT_RMS} = –13 dBFS

Figure 6-543 TX 20-MHz LTE Error Vector Magnitude at 4.9 GHz