JAJSQS5 データシート

JAJSQS5 july 2023 AFE7955

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

ABJ|400
- MCBG079C
ALK|400
- MPBGAU3B

サーマルパッド・メカニカル・データ

発注情報

5.12.5 TX Typical Characteristics at 4.9 GHz

Typical values at T_A = +25°C with nominal supplies. Default conditions: TX input data rate = 491.52 MSPS, f_DAC = 11796.48 MSPS (24x interpolation), interleave mode, 1^st Nyquist zone output, PLL clock mode with f_REF = 491.52 MHz, A_OUT = –1 dBFS, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated

Excluding PCB and cable losses, A_out = -0.5 dFBS, DSA = 0, 4.9 GHz matching

Figure 5-149 TX Full Scale vs RF Frequency and Channel at 11796.48 MSPS

f_DAC = 11796.48 MSPS, A_out = -0.5 dFBS, matching 4.9 GHz

Figure 5-151 TX Output Power vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 5-153 TX Calibrated Differential Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 5-155 TX Calibrated Integrated Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 5-157 TX Calibrated Differential Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 5-159 TX Calibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)
Phase DNL spike may occur at any DSA setting.

Figure 5-161 TX Calibrated Differential Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 5-163 TX Calibrated Integrated Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)

Figure 5-165 TX Calibrated Differential Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, channel with the median variation over DSA setting at 25°C
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 5-167 TX Calibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9GHz, -13 dBFS each tone

Figure 5-169 TX IMD3 vs DSA Setting at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9 GHz, –13 dBFS each tone, worst channel

Figure 5-171 TX IMD3 vs Tone Spacing and Temperature at 4.9 GHz

Matching at 4.9 GHz, Single tone, f_DAC = 11.79648 GSPS, interleave mode, 40-MHz offset, DSA=0dB

Figure 5-173 TX Single Tone Output Noise vs Frequency and Amplitude at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 5-175 TX 20-MHz LTE ACPR vs Digital Level at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 5-177 TX 20-MHz LTE ACPR vs DSA at 4.9 GHz

Matching at 4.9 GHz, f_DAC = 11.79648GSPS, interleave mode, normalized to output power at harmonic frequency

Figure 5-179 TX HD2 vs Digital Amplitude and Output Frequency at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = f_S/n ± f_OUT.

Figure 5-181 TX Single Tone (–12 dBFS) Output Spectrum at 4.9 GHz (0-f_DAC)

f_DAC = 11796.48 MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = f_S/n ± f_OUT.

Figure 5-183 TX Single Tone (–1 dBFS) Output Spectrum at 4.9 GHz (0-f_DAC)

Excluding PCB and cable losses, A_out = -0.5dFBS, DSA = 0, 4.9 GHz matching

Figure 5-150 TX Full Scale vs RF Frequency and Channel at 5898.24 MSPS, Straight Mode, 2nd Nyquist Zone

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 5-152 TX Uncalibrated Differential Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 5-154 TX Uncalibrated Integrated Gain Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Gain Error = P_OUT(DSA Setting – 1) – P_OUT(DSA Setting) + 1

Figure 5-156 TX Uncalibrated Differential Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48MSPS, interleaved mode, matching at 4.9 GHz
Integrated Gain Error = P_OUT(DSA Setting) – P_OUT(DSA Setting = 0) + (DSA Setting)

Figure 5-158 TX Uncalibrated Integrated Gain Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)

Figure 5-160 TX Uncalibrated Differential Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 5-162 TX Uncalibrated Integrated Phase Error vs DSA Setting and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz
Differential Phase Error = Phase_OUT(DSA Setting – 1) – Phase_OUT(DSA Setting)

Figure 5-164 TX Uncalibrated Differential Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48MSPS, interleaved mode, matching at 4.9 GHz
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)

Figure 5-166 TX Uncalibrated Integrated Phase Error vs DSA Setting and Temperature at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, P_OUT = –13 dBFS

Figure 5-168 TX Output Noise vs Channel and Attenuation at 2.6 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9GHz, –13 dBFS each tone

Figure 5-170 TX IMD3 vs Tone Spacing and Channel at 4.9 GHz

f_DAC = 11796.48 MSPS, interleaved mode, matching at 4.9 GHz, f_CENTER = 4.9 GHz, f_SPACING = 20 MHz

Figure 5-172 TX IMD3 vs Digital Level at 4.9 GHz

TM1.1, P_{OUT_RMS} = –13 dBFS

Figure 5-174 TX 20-MHz LTE Output Spectrum at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 5-176 TX 20-MHz LTE alt-ACPR vs Digital Level at 4.9 GHz

Matching at 4.9 GHz, single carrier 20-MHz BW TM1.1 LTE

Figure 5-178 TX 20-MHz LTE alt-ACPR vs DSA at 4.9 GHz

Matching at 4.9 GHz, f_DAC = 11.79648 GSPS, interleave mode, normalized to output power at harmonic frequency

Figure 5-180 TX HD3 vs Digital Amplitude and Output Frequency at 4.9 GHz

f_DAC = 11796.48 MSPS, interleave mode, 4.9 GHz matching, includes PCB and cable losses. ILn = f_S/n ± f_OUT.

Figure 5-182 TX Single Tone (–6 dBFS) Output Spectrum at 4.9 GHz (0-f_DAC)