JAJSNU3 December 2023 AFE782H1 , AFE882H1
PRODUCTION DATA
Memory built-in self-test (MBIST) verifies the validity of the static random-access memory (SRAM) used for the FIFO buffers. When initiated, the MBIST takes control of the SRAM module until completion.
Disable HART communication while the MBIST is running. Communication with the FIFO buffers during the MBIST produces unreliable results. Two status bits, GEN_STATUS.MBIST_DONE and GEN_STATUS.MBIST_FAIL, can be monitored for completion or failure, or used to create IRQ events.
Do not try to read back the GEN_STATUS register while the MBIST is running. The MBIST control logic generates narrow pulses for the MBIST_DONE and MBIST_FAIL status flags. The status flags can be missed if these pulses occur during the readback of the GEN_STATUS register. To avoid missing the MBIST_DONE flag, mask all the status bits except GEN_STATUS_MASK.MBIST_DONE and then either:
Wait until MBIST_DONE is reported, verify the status of the MBIST_FAIL flag, and then resume normal operation.