JAJSHC9B May   2019  – October 2021 ALM2402F-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 12 V
    6. 6.6 Electrical Characteristics: VS = 5 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 OTF/SH_DN
      2. 7.3.2 Output Stage Supply Voltage
      3. 7.3.3 Current-Limit and Short-Circuit Protection
      4. 7.3.4 Input Common-Mode Overvoltage Clamps
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Output Stage
      7. 7.3.7 EMI Susceptibility and Input Filtering
    4. 7.4 Device Functional Modes
      1. 7.4.1 Open-Loop and Closed-Loop Operation
      2. 7.4.2 Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Load and Stability
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Resolver Excitation Input (Op Amp Output)
          1. 8.2.2.1.1 Excitation Voltage
          2. 8.2.2.1.2 Excitation Frequency
          3. 8.2.2.1.3 Excitation Impedance
        2. 8.2.2.2 Resolver Output
        3. 8.2.2.3 Power Dissipation and Thermal Reliability
          1. 8.2.2.3.1 Improving Package Thermal Performance
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

For best operational performance of the device, use good PCB layout practices, including:

  • Noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry.
    • Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close as possible to the device. A single bypass capacitor from V+ to ground is applicable for single supply applications.
  • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. For more detailed information, see Circuit Board Layout Techniques.
  • To reduce parasitic coupling, run the input traces as far away as possible from the supply or output traces. If keeping the traces separate is not possible, then cross the sensitive trace perpendicular, as opposed to in parallel with the noisy trace.
  • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit.