JAJSVM4A
September 2024 – November 2024
AM2612
ADVANCE INFORMATION
1
1
特長
2
アプリケーション
3
概要
3.1
機能ブロック図
4
Package Comparison
4.1
Related Products
5
Terminal Configuration and Functions
5.1
Pin Diagram
5.1.1
AM261x ZCZ Pin Diagram
5.1.2
AM261x ZFG Pin Diagram
5.1.3
AM261x ZEJ Pin Diagram
5.1.4
AM261x ZNC Pin Diagram
5.2
Pin Attributes
15
16
5.3
Signal Descriptions
18
5.3.1
ADC
20
21
22
5.3.2
ADC_CAL
24
5.3.3
ADC VREF
26
5.3.4
CPSW
28
29
30
31
32
33
34
5.3.5
CPTS
36
5.3.6
DAC
38
5.3.7
EPWM
40
41
42
43
44
45
46
47
48
49
5.3.8
EQEP
51
52
5.3.9
FSI
54
55
5.3.10
GPIO
57
5.3.11
GPMC0
59
5.3.12
I2C
61
62
63
5.3.13
LIN
65
66
67
5.3.14
MCAN
69
70
5.3.15
SPI (MCSPI)
72
73
74
75
5.3.16
MMC
77
5.3.17
Power Supply
79
5.3.18
PRU-ICSS
81
82
83
84
85
5.3.19
OSPI
87
88
5.3.20
SDFM
90
91
5.3.21
System and Miscellaneous
5.3.21.1
Boot Mode Configuration
94
5.3.21.2
Clocking
96
97
98
5.3.21.3
Emulation and Debug
100
101
5.3.21.4
SYSTEM
103
5.3.21.5
USB0
105
5.3.21.6
VMON
107
108
109
5.3.22
UART
111
112
113
114
115
116
5.3.23
XBAR
118
119
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Recommended Operating Conditions
6.3
Electrical Characteristics
6.3.1
Digital and Analog IO Electrical Characteristics
6.4
Thermal Resistance Characteristics
6.4.1
Package Thermal Characteristics
7
Detailed Description
7.1
Overview
7.2
Processor Subsystems
7.2.1
Arm Cortex-R5F Subsystem
8
Applications, Implementation, and Layout
8.1
Device Connection and Layout Fundamentals
8.1.1
External Oscillator
8.1.2
JTAG, EMU, and TRACE
8.1.3
Hardware Reference Design and Guidelines
9
Device and Documentation Support
9.1
Device Nomenclature
9.1.1
Device Naming Convention
9.2
Tools and Software
9.3
Documentation Support
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
ZFG|304
サーマルパッド・メカニカル・データ
発注情報
jajsvm4a_oa
Table 5-60 JTAG Signal Descriptions
Signal Name [
1
]
Pin Type [
2
]
Description [
3
]
ZCZ PIN [
4
]
ZFG PIN [
4
]
ZEJ PIN [
4
]
ZNC PIN [
4
]
TCK
I
JTAG Test Clock Input
B3
D4
C6
B6
TDI
I
JTAG Test Data Input
C5
C5
D5
C7
TDO
O
JTAG Test Data Output
C4
E5
B5
A7
TMS
IO
JTAG Test Mode Select Input
D5
D6
C7
B7