JAJSDZ0J October   2011  – April 2016 AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3359

PRODUCTION DATA.  

  1. 1デバイスの概要
    1. 1.1 特長
    2. 1.2 アプリケーション
    3. 1.3 概要
    4. 1.4 機能ブロック図
  2. 2改訂履歴
  3. 3Device Comparison
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
      1. 4.1.1 ZCE Package Pin Maps (Top View)
      2. 4.1.2 ZCZ Package Pin Maps (Top View)
    2. 4.2 Pin Attributes
    3. 4.3 Signal Descriptions
      1. 4.3.1 External Memory Interfaces
      2. 4.3.2 General-Purpose IOs
      3. 4.3.3 Miscellaneous
        1. 4.3.3.1 eCAP
        2. 4.3.3.2 eHRPWM
        3. 4.3.3.3 eQEP
        4. 4.3.3.4 Timer
      4. 4.3.4 PRU-ICSS
        1. 4.3.4.1 PRU0
        2. 4.3.4.2 PRU1
      5. 4.3.5 Removable Media Interfaces
      6. 4.3.6 Serial Communication Interfaces
        1. 4.3.6.1 CAN
        2. 4.3.6.2 GEMAC_CPSW
        3. 4.3.6.3 I2C
        4. 4.3.6.4 McASP
        5. 4.3.6.5 SPI
        6. 4.3.6.6 UART
        7. 4.3.6.7 USB
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Power-On Hours (POH)
    4. 5.4  Operating Performance Points (OPPs)
    5. 5.5  Recommended Operating Conditions
    6. 5.6  Power Consumption Summary
    7. 5.7  DC Electrical Characteristics
    8. 5.8  Thermal Resistance Characteristics for ZCE and ZCZ Packages
    9. 5.9  External Capacitors
      1. 5.9.1 Voltage Decoupling Capacitors
        1. 5.9.1.1 Core Voltage Decoupling Capacitors
        2. 5.9.1.2 I/O and Analog Voltage Decoupling Capacitors
      2. 5.9.2 Output Capacitors
    10. 5.10 Touch Screen Controller and Analog-to-Digital Subsystem Electrical Parameters
  6. 6Power and Clocking
    1. 6.1 Power Supplies
      1. 6.1.1 Power Supply Slew Rate Requirement
      2. 6.1.2 Power-Down Sequencing
      3. 6.1.3 VDD_MPU_MON Connections
      4. 6.1.4 Digital Phase-Locked Loop Power Supply Requirements
    2. 6.2 Clock Specifications
      1. 6.2.1 Input Clock Specifications
      2. 6.2.2 Input Clock Requirements
        1. 6.2.2.1 OSC0 Internal Oscillator Clock Source
        2. 6.2.2.2 OSC0 LVCMOS Digital Clock Source
        3. 6.2.2.3 OSC1 Internal Oscillator Clock Source
        4. 6.2.2.4 OSC1 LVCMOS Digital Clock Source
        5. 6.2.2.5 OSC1 Not Used
      3. 6.2.3 Output Clock Specifications
      4. 6.2.4 Output Clock Characteristics
        1. 6.2.4.1 CLKOUT1
        2. 6.2.4.2 CLKOUT2
  7. 7Peripheral Information and Timings
    1. 7.1  Parameter Information
      1. 7.1.1 Timing Parameters and Board Routing Analysis
    2. 7.2  Recommended Clock and Control Signal Transition Behavior
    3. 7.3  OPP50 Support
    4. 7.4  Controller Area Network (CAN)
      1. 7.4.1 DCAN Electrical Data and Timing
    5. 7.5  DMTimer
      1. 7.5.1 DMTimer Electrical Data and Timing
    6. 7.6  Ethernet Media Access Controller (EMAC) and Switch
      1. 7.6.1 EMAC and Switch Electrical Data and Timing
        1. 7.6.1.1 EMAC/Switch MDIO Electrical Data and Timing
        2. 7.6.1.2 EMAC and Switch MII Electrical Data and Timing
        3. 7.6.1.3 EMAC and Switch RMII Electrical Data and Timing
        4. 7.6.1.4 EMAC and Switch RGMII Electrical Data and Timing
    7. 7.7  External Memory Interfaces
      1. 7.7.1 General-Purpose Memory Controller (GPMC)
        1. 7.7.1.1 GPMC and NOR Flash—Synchronous Mode
        2. 7.7.1.2 GPMC and NOR Flash—Asynchronous Mode
        3. 7.7.1.3 GPMC and NAND Flash—Asynchronous Mode
      2. 7.7.2 mDDR(LPDDR), DDR2, DDR3, DDR3L Memory Interface
        1. 7.7.2.1 mDDR (LPDDR) Routing Guidelines
          1. 7.7.2.1.1 Board Designs
          2. 7.7.2.1.2 LPDDR Interface
            1. 7.7.2.1.2.1 LPDDR Interface Schematic
            2. 7.7.2.1.2.2 Compatible JEDEC LPDDR Devices
            3. 7.7.2.1.2.3 PCB Stackup
            4. 7.7.2.1.2.4 Placement
            5. 7.7.2.1.2.5 LPDDR Keepout Region
            6. 7.7.2.1.2.6 Bulk Bypass Capacitors
            7. 7.7.2.1.2.7 High-Speed Bypass Capacitors
            8. 7.7.2.1.2.8 Net Classes
            9. 7.7.2.1.2.9 LPDDR Signal Termination
          3. 7.7.2.1.3 LPDDR CK and ADDR_CTRL Routing
        2. 7.7.2.2 DDR2 Routing Guidelines
          1. 7.7.2.2.1 Board Designs
          2. 7.7.2.2.2 DDR2 Interface
            1. 7.7.2.2.2.1  DDR2 Interface Schematic
            2. 7.7.2.2.2.2  Compatible JEDEC DDR2 Devices
            3. 7.7.2.2.2.3  PCB Stackup
            4. 7.7.2.2.2.4  Placement
            5. 7.7.2.2.2.5  DDR2 Keepout Region
            6. 7.7.2.2.2.6  Bulk Bypass Capacitors
            7. 7.7.2.2.2.7  High-Speed (HS) Bypass Capacitors
            8. 7.7.2.2.2.8  Net Classes
            9. 7.7.2.2.2.9  DDR2 Signal Termination
            10. 7.7.2.2.2.10 DDR_VREF Routing
          3. 7.7.2.2.3 DDR2 CK and ADDR_CTRL Routing
        3. 7.7.2.3 DDR3 and DDR3L Routing Guidelines
          1. 7.7.2.3.1 Board Designs
            1. 7.7.2.3.1.1 DDR3 versus DDR2
          2. 7.7.2.3.2 DDR3 Device Combinations
          3. 7.7.2.3.3 DDR3 Interface
            1. 7.7.2.3.3.1  DDR3 Interface Schematic
            2. 7.7.2.3.3.2  Compatible JEDEC DDR3 Devices
            3. 7.7.2.3.3.3  PCB Stackup
            4. 7.7.2.3.3.4  Placement
            5. 7.7.2.3.3.5  DDR3 Keepout Region
            6. 7.7.2.3.3.6  Bulk Bypass Capacitors
            7. 7.7.2.3.3.7  High-Speed Bypass Capacitors
              1. 7.7.2.3.3.7.1 Return Current Bypass Capacitors
            8. 7.7.2.3.3.8  Net Classes
            9. 7.7.2.3.3.9  DDR3 Signal Termination
            10. 7.7.2.3.3.10 DDR_VREF Routing
            11. 7.7.2.3.3.11 VTT
          4. 7.7.2.3.4 DDR3 CK and ADDR_CTRL Topologies and Routing Definition
            1. 7.7.2.3.4.1 Two DDR3 Devices
              1. 7.7.2.3.4.1.1 CK and ADDR_CTRL Topologies, Two DDR3 Devices
              2. 7.7.2.3.4.1.2 CK and ADDR_CTRL Routing, Two DDR3 Devices
            2. 7.7.2.3.4.2 One DDR3 Device
              1. 7.7.2.3.4.2.1 CK and ADDR_CTRL Topologies, One DDR3 Device
              2. 7.7.2.3.4.2.2 CK and ADDR_CTRL Routing, One DDR3 Device
          5. 7.7.2.3.5 Data Topologies and Routing Definition
            1. 7.7.2.3.5.1 DQS[x] and DQ[x] Topologies, Any Number of Allowed DDR3 Devices
            2. 7.7.2.3.5.2 DQS[x] and DQ[x] Routing, Any Number of Allowed DDR3 Devices
          6. 7.7.2.3.6 Routing Specification
            1. 7.7.2.3.6.1 CK and ADDR_CTRL Routing Specification
            2. 7.7.2.3.6.2 DQS[x] and DQ[x] Routing Specification
    8. 7.8  I2C
      1. 7.8.1 I2C Electrical Data and Timing
    9. 7.9  JTAG Electrical Data and Timing
    10. 7.10 LCD Controller (LCDC)
      1. 7.10.1 LCD Interface Display Driver (LIDD Mode)
      2. 7.10.2 LCD Raster Mode
    11. 7.11 Multichannel Audio Serial Port (McASP)
      1. 7.11.1 McASP Device-Specific Information
      2. 7.11.2 McASP Electrical Data and Timing
    12. 7.12 Multichannel Serial Port Interface (McSPI)
      1. 7.12.1 McSPI Electrical Data and Timing
        1. 7.12.1.1 McSPI—Slave Mode
        2. 7.12.1.2 McSPI—Master Mode
    13. 7.13 Multimedia Card (MMC) Interface
      1. 7.13.1 MMC Electrical Data and Timing
    14. 7.14 Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
      1. 7.14.1 Programmable Real-Time Unit (PRU-ICSS PRU)
        1. 7.14.1.1 PRU-ICSS PRU Direct Input/Output Mode Electrical Data and Timing
        2. 7.14.1.2 PRU-ICSS PRU Parallel Capture Mode Electrical Data and Timing
        3. 7.14.1.3 PRU-ICSS PRU Shift Mode Electrical Data and Timing
      2. 7.14.2 PRU-ICSS EtherCAT (PRU-ICSS ECAT)
        1. 7.14.2.1 PRU-ICSS ECAT Electrical Data and Timing
      3. 7.14.3 PRU-ICSS MII_RT and Switch
        1. 7.14.3.1 PRU-ICSS MDIO Electrical Data and Timing
        2. 7.14.3.2 PRU-ICSS MII_RT Electrical Data and Timing
      4. 7.14.4 PRU-ICSS Universal Asynchronous Receiver Transmitter (PRU-ICSS UART)
    15. 7.15 Universal Asynchronous Receiver Transmitter (UART)
      1. 7.15.1 UART Electrical Data and Timing
      2. 7.15.2 UART IrDA Interface
  8. 8Device and Documentation Support
    1. 8.1 Device Nomenclature
    2. 8.2 Tools and Software
    3. 8.3 Documentation Support
    4. 8.4 Related Links
    5. 8.5 Community Resources
    6. 8.6 商標
    7. 8.7 静電気放電に関する注意事項
    8. 8.8 Glossary
  9. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Via Channel
    2. 9.2 Packaging Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • ZCZ|324
サーマルパッド・メカニカル・データ
発注情報

8 Device and Documentation Support

8.1 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all microprocessors (MPUs) and support tools. Each device has one of three prefixes: X, P, or null (no prefix) (for example, XAM3358AZCE). Texas Instruments recommends two of three possible prefix designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development from engineering prototypes (TMDX) through fully qualified production devices and tools (TMDS).

Device development evolutionary flow:

    X Experimental device that is not necessarily representative of the final device's electrical specifications and may not use production assembly flow.
    P Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical specifications.
    nullProduction version of the silicon die that is fully qualified.

Support tool development evolutionary flow:

    TMDX Development-support product that has not yet completed Texas Instruments internal qualification testing.
    TMDS Fully-qualified development-support product.

X and P devices and TMDX development-support tools are shipped against the following disclaimer:

"Developmental product is intended for internal evaluation purposes."

Production devices and TMDS development-support tools have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.

Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.

TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type (for example, ZCE), the temperature range (for example, blank is the default commercial temperature range), and the device speed range, in megahertz (for example, 27 is 275 MHz). Figure 8-1 provides a legend for reading the complete device name for any AM335x device.

For orderable part numbers of AM335x devices in the ZCE and ZCZ package types, see the Package Option Addendum of this document, ti.com, or contact your TI sales representative.

For additional description of the device nomenclature markings on the die, see the AM335x Sitara Processors Silicon Errata.

AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351 dev_nomen_pg2_sprs717.gif
A. The AM3358 device shown in this device nomenclature example is one of several valid part numbers for the AM335x family of devices. For orderable device part numbers, see the Package Option Addendum of this document.
B. BGA = Ball grid array
Figure 8-1 AM335x Device Nomenclature

8.2 Tools and Software

TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed below.

Design Kits and Evaluation Modules

    AM335x Evaluation Module Enables developers to immediately start evaluating the AM335x processor family (AM3351, AM3352, AM3354, AM3356, AM3358) and begin building applications such as portable navigation, portable gaming, home/building automation and others.
    AM335x Starter Kit Provides a stable and affordable platform to quickly start evaluation of Sitara ARM Cortex-A8 AM335x Processors (AM3351, AM3352, AM3354, AM3356, AM3358) and accelerate development for smart appliance, industrial and networking applications. It is a low-cost development platform based on the ARM Cortex-A8 processor that is integrated with options such as Dual Gigabit Ethernet, DDR3 and LCD touch screen.
    BeagleBone Black Development Board Low-cost, open source, community-supported development platform for ARM Cortex-A8 processor developers and hobbyists. Boot Linux in under 10-seconds and get started on Sitara AM335x ARM Cortex-A8 processor development in less than 5 minutes with just a single USB cable.
    BeagleBone Development Board Low-cost, community-supported development platform for ARM Cortex-A8 processor developers. Boot Linux in under 10-seconds and get started on Sitara AM335x ARM Cortex-A8 processor development in less than 5 minutes with just a single USB cable. For TI-supported hardware platforms, consider the Sitara ARM AM335x Starter Kit or AM335x Evaluation Module.
    Data Concentrator Evaluation Module Based on AM3359 as the main processor and has Power Line Communication (PLC) Module to support various OFDM PLC communication standards. TMDSDC3359 also has capability to support multiple interfaces, sub-1GHz and 2.4GHz RF, Ethernet, RS-232, and RS-485. This evaluation module is ideal development platform for smart grid infrastructure applications including data concentrator, convergent node of grid sensor network, and control equipment of power automation.
    WiLink™ 8 Dual Band 2.4 & 5 GHz Wi-Fi® + Bluetooth® COM8 Evaluation Module Enables customers to add both Wi-Fi and Bluetooth to home and building automation, smart energy, gateways, wireless audio, enterprise, wearables and many more industrial and Internet of Things (IoT) applications. TI’s WiLink 8 modules are certified and offer high throughput and extended range along with Wi-Fi and Bluetooth coexistence in a power-optimized design. Drivers for the Linux and Android high-level operating systems (HLOSs) are available free of charge from TI for the Sitara AM335x microprocessor (Linux and Android version restrictions apply).
    WiLink 8 Module 2.4 GHz WiFi + Bluetooth COM8 Evaluation Module Enables customers to add Wi-Fi and Bluetooth (WL183x module only) to embedded applications based on TI's Sitara microprocessors. TI’s WiLink 8 Wi-Fi + Bluetooth modules are pre-certified and offer high throughput and extended range along with Wi-Fi and Bluetooth coexistence (WL183x modules only) in a power-optimized design. Drivers for the Linux and Android high-level operating systems (HLOSs) are available free of charge from TI for the Sitara AM335x microprocessor (Linux and Android version restrictions apply).

TI Designs

    EtherCAT Communications Development Platform Allows designers to implement real-time EtherCAT communications standards in a broad range of industrial automation equipment. It enables low foot print designs in applications such as industrial automation, factory automation or industrial communication with minimal external components and with best in class low power performance.
    PROFIBUS Communications Development Platform Allows designers to implement PROFIBUS communications standards in a broad range of industrial automation equipment. It enables low foot print designs in applications such as industrial automation, factory automation or industrial communication with minimal external components and with best in class low power performance.
    Ethernet/IP Communications Development Platform Allows designers to mplement Ethernet/IP communications standards in a broad range of industrial automation equipment. It enables low foot print designs in applications such as industrial automation, factory automation or industrial communication with minimal external components and with best in class low power performance.
    Acontis EtherCAT Master Stack Reference Design Highly portable software stack that can be used on various embedded platforms. The EC-Master supports the high performane TI Sitara MPUs, it provides a sophisticated EtherCAT Master solution which customers can use to implement EtherCAT communication interface boards, EtherCAT based PLC or motion control applications. The EC-Master architectural design does not require additional tasks to be scheduled, thus the full stack functionality is available even on an OS less platform such as TI Starterware suported on AM335x. Due to this architecture combined with the high speed Ethernet driver it is possible to implement EtherCAT master based applications on the Sitara platform with short cycle times of 100 microseconds or even below.
    Solar Inverter Gateway Development Platform Reference Design Adds communication functions to solar energy generation systems to enable system monitoring, real-time feedback, system updates, and more. The TIDEP0044 reference design describes the implementation of a solar inverter gateway using display, Ethernet, USB, and CAN on the TMDXEVM3358 featuring TI's AM335x processor.
    PRU Real-Time I/O Evaluation Reference Design BeagleBone Black add-on board that allows users get to know TI’s powerful Programmable Real-Time Unit (PRU) core and basic functionality. The PRU is a low-latency microcontroller subsystem integrated in the Sitara AM335x and AM437x family of devices. The PRU core is optimized for deterministic, real-time processing, direct access to I/Os and ultra-low-latency requirements. With LEDs and push buttons for GPIO, audio, a temp sensor, optional character display and more, this add-on board includes schematics, bill of materials (BOM), design files, and design guide to teach the basics of the PRU.
    Smart Home and Energy Gateway Reference Design Provides example implementation for measurement, management and communication of energy systems for smart homes and buildings. This example design is a bridge between different communication interfaces, such as WiFi, Ethernet, ZigBee or Bluetooth, that are commonly found in residential and commercial buildings. Since objects in the house and buildings are becoming more and more connected, the gateway design needs to be flexible to accommodate different RF standard, since no single RF standard is dominating the market. This example gateway addresses this problem by supporting existing legacy RF standards (WiFi, Bluetooth) and newer RF standards (ZigBee, BLE).
    Streaming Audio Reference Design Minimizes design time for customers by offering small form factor hardware and major software components, including streaming protocols and internet radio services. With this reference design, TI offers a quick and easy transition path to the AM335x and WiLink8 platform solution. This proven combo solution provides key advantages in this market category that helps bring your products to the next level.

Software

    Processor SDK for AM335X Sitara Processors - Linux and TI-RTOS Support Unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos. All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly reuse and migrate software across devices. Developing scalable platform solutions has never been easier than with the Processor SDK and TI’s embedded processor solutions.
    G3 Data Concentrator Power-Line Communication Modem G3-PLC standard for narrowband OFDM Power Line Communications. The data concentrator solution is designed for the head-end systems which communicate with the end meters (“service node”) in the neighborhood area network.
    PRIME Data Concentrator Power-Line Communication Modem PRIME standard for narrowband OFDM Power Line Communications. The data concentrator solution is designed for the head-end systems which communicate with the end meters (“service node”) in the neighborhood area network.
    TI Dual-Mode Bluetooth Stack Comprised of Single-Mode and Dual-Mode offerings implementing the Bluetooth 4.0 specification. The Bluetooth stack is fully Bluetooth Special Interest Group (SIG) qualified, certified and royalty-free, provides simple command line sample applications to speed development, and upon request has MFI capability.
    Cryptography for TI Devices Enables encryption, crypto for TI devices. These files contain only cryptographic modules that were part of a TI software release. For the complete software release please search ti.com for your device part number, and download the Software Development Kit (SDK).

Development Tools

    Code Composer Studio (CCS) Integrated Development Environment (IDE) for Sitara ARM Processors Integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor, project build environment, debugger, profiler, and many other features. The intuitive IDE provides a single user interface taking you through each step of the application development flow. Familiar tools and interfaces allow users to get started faster than ever before. Code Composer Studio combines the advantages of the Eclipse software framework with advanced embedded debug capabilities from TI resulting in a compelling feature-rich development environment for embedded developers.
    Pin Mux Tool Provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI MPUs. Results are output as C header/code files that can be imported into software development kits (SDK) or used to configure customer's custom software. Version 3 of the Pin Mux utility adds the capability of automatically selecting a mux configuration that satisfies the entered requirements.
    Power Estimation Tool (PET) Provides users the ability to gain insight in to the power consumption of select TI processors. The tool includes the ability for the user to choose multiple application scenarios and understand the power consumption as well as how advanced power saving techniques can be applied to further reduce overall power consumption.
    XDS200 USB Debug Probe Connects to the target board via a TI 20-pin connector (with multiple adapters for TI 14-pin, ARM 10-pin and ARM 20-pin) and to the host PC via USB2.0 High Speed (480Mbps). It also requires a license of Code Composer Studio IDE running on the host PC.
    XDS560v2 System Trace USB and Ethernet Debug Probe Adds system pin trace in its large external memory buffer. Available for selected TI devices, this external memory buffer captures device-level information that allows obtaining accurate bus performance activity and throughput, as well as power management of core and peripherals. Also, all XDS debug probes support Core and System Trace in all ARM and DSP processors that feature an Embedded Trace Buffer (ETB).
    XDS560v2 System Trace USB Debug Probe Adds system pin trace in its large external memory buffer. Available for selected TI devices, this external memory buffer captures device-level information that allows obtaining accurate bus performance activity and throughput, as well as power management of core and peripherals. Also, all XDS debug probes support Core and System Trace in all ARM and DSP processors that feature an Embedded Trace Buffer (ETB).

Models

8.3 Documentation Support

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

The current documentation that describes the processor, related peripherals, and other technical collateral is listed below.

Errata

Application Reports

    High-Speed Layout GuidelinesAs modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
    AM335x Reliability Considerations in PLC ApplicationsProgrammable Logic Controllers (PLC) are used as the main control in an automation system with high- reliability expectations and long life in harsh environments. Processors used in these applications require an assessment of performance verses expected power on hours to achieve the optimal performance for the application.
    AM335x Thermal ConsiderationsDiscusses the thermal considerations of the AM335x devices. It offers guidance on analysis of the processor's thermal performance, suggests improvements for an end system to aid in overcoming some of the existing challenges of producing a good thermal design, and provides real power/thermal data measured with AM335x EVMs for user evaluation.

User's Guides

Selection and Solution Guides

    Connected Sensors Building Automation Systems Guide The use of connected sensors has a wide range of uses in building automation applications, from monitoring human safety and security, controlling the environment and ambience specified by the comfort preferences of the end user, or either periodic or continuous data logging of environmental and system data to detect irregular system conditions.

White Papers

    Building Automation for Enhanced Energy And Operational Efficiency Discusses building automation solutions, focusing on aspects of the Building Control System. TI’s Sitara processors facilitate intelligent automation of the control systems. The scalable Sitara processor portfolio offers an opportunity to build a platform solution that also spans beyond Building Control Systems.
    POWERLINK on TI Sitara Processors Supports Ethernet standard features such as cross-traffic, hot-plugging and different types of network configurations such as star, ring and mixed topologies.
    EtherNet/IP on TI's Sitara AM335x Processors EtherNet/IP™ (EtherNet/Industrial Protocol) is an industrial automation networking protocol based on the IEEE 802.3 Ethernet standard that has dominated the world of IT networking for the past three decades.
    PROFINET on TI’s Sitara AM335x Processors To integrate PROFINET into the Sitara AM335x processor, TI has built upon its programmable realtime unit (PRU) technology to create an industrial communication sub-system (ICSS).
    Mainline Linux Ensures Stability and Innovation Enabling and empowering the rapid development of new functionality starts at the foundational level of the system’s software environment – that is, at the level of the Linux kernel – and builds upward from there.
    Linaro Speeds Development in TI Linux SDKs Linaro’s software is not a Linux distribution; in fact, it is distribution neutral. The focus of the organization’s 120 engineers is on optimizing base-level open-source software in areas that interact directly with the silicon such as multimedia, graphics, power management, the Linux kernel and booting processes.
    Getting Started on TI ARM Embedded Processor Development Beginning with an overview of ARM technology and available processor platforms, this paper will then explore the fundamentals of embedded design that influence a system’s architecture and, consequently, impact processor selection.

Other Documents

    Industrial Communication with Sitara AM335x ARM Cortex-A8 Microprocessors The industry’s first low- power ARM Cortex-A8 devices to incorporate multiple industrial communication protocols on a single chip. The six pin-to-pin and software-compatible devices in this generation of processors, along with industrial hardware development tools, software and analog complements, provide a total industrial system solution.
    Sitara Processors Using the ARM Cortex-A series of cores, are optimized system solutions that go beyond the core, delivering products that support rich graphics capabilities, LCD displays and multiple industrial protocols.

8.4 Related Links

Table 8-1 lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy.

Table 8-1 Related Links

PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY
AM3359 Click here Click here Click here Click here Click here
AM3358 Click here Click here Click here Click here Click here
AM3357 Click here Click here Click here Click here Click here
AM3356 Click here Click here Click here Click here Click here
AM3354 Click here Click here Click here Click here Click here
AM3352 Click here Click here Click here Click here Click here
AM3351 Click here Click here Click here Click here Click here

8.5 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community The TI engineer-to-engineer (E2E) community was created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    TI Embedded Processors Wiki Established to help developers get started with Embedded Processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices.

8.6 商標

Sitara, SmartReflex, WiLink, E2E are trademarks of Texas Instruments.

NEON is a trademark of ARM Ltd or its subsidiaries.

ARM, Cortex are registered trademarks of ARM Ltd or its subsidiaries.

Bluetooth is a registered trademark of Bluetooth SIG.

EtherCAT is a registered trademark of EtherCAT Technology Group.

Android is a trademark of Google Inc.

PowerVR SGX is a trademark of Imagination Technologies Limited.

Linux is a registered trademark of Linus Torvalds.

Wi-Fi is a registered trademark of Wi-Fi Alliance.

All other trademarks are the property of their respective owners.

8.7 静電気放電に関する注意事項

esds-image

すべての集積回路は、適切なESD保護方法を用いて、取扱いと保存を行うようにして下さい。

静電気放電はわずかな性能の低下から完全なデバイスの故障に至るまで、様々な損傷を与えます。高精度の集積回路は、損傷に対して敏感であり、極めてわずかなパラメータの変化により、デバイスに規定された仕様に適合しなくなる場合があります。

8.8 Glossary

    TI Glossary This glossary lists and explains terms, acronyms, and definitions.