JAJSJ32C December 2019 – September 2023 AM6526 , AM6528 , AM6546 , AM6548
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
Table 6-7, Table 6-8, Figure 6-6, Figure 6-7, and Figure 6-8 present the reset timing requirements and switching characteristics.
NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
---|---|---|---|---|---|
PORz Pin | |||||
RST1 | tw(PORzL) | Pulse Width minimum, PORz low | 2000 | ns | |
RST2 | th(SUPPLIES VALID - PORz) | Hold time, PORz active (low) after all supplies valid | 2000000 | ns | |
RESETz Pin | |||||
RST5 | tw(RESETzL) | Pulse Width minimum, RESETz low | 400 | ns | |
MCU_PORz Pin | |||||
RST13 | tw(MCU_PORzL) | Pulse Width minimum, MCU_PORz | 2000 | ns | |
RST8 | th(SUPPLIES VALID - MCU_PORz) | Hold time, MCU_PORz active (low) after all supplies valid | 2000000 | ns | |
MCU_RESETz Pin | |||||
RST9 | tw(MCU_RESETzL) | Pulse Width minimum, MCU_RESETz | 400 | ns | |
MCU_BYP_POR Pin | |||||
RST12 | tsu(MCU_BYP_POR-MCU_PORz) | Setup time, MCU_BYP_POR active (high) before all supplies are valid | 1000000 | ns |
NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
---|---|---|---|---|---|
PORz Pin | |||||
RST3 | td(PORz-PORz_OUT low) | Delay time, PORz active (low) to PORz_OUT active (low) | 0 | ns | |
RST4 | td(PORz-PORz_OUT high) | Delay time, PORz inactive (high) to PORz_OUT inactive (high) | 0 | ns | |
RESETz Pin | |||||
RST6 | td(RESETz-RESETSTATz low) | Delay time, RESETz active (low) to RESETSTATz active (low) | 4106 | ns | |
RST7 | td(RESETz-RESETSTATz high) | Delay time, RESETz inactive (high) to RESETSTATz inactive (high) | 380000 | ns | |
MCU_RESETSTATz Pin | |||||
RST10 | td(MCU_RESETz-MCU_RESETSTATz low) | Delay time, MCU_RESETz active (low) to MCU_RESETSTATz active (low) | 4106 | ns | |
RST11 | td(MCU_RESETz-MCU_RESETSTATz high) | Delay time, MCU_RESETz inactive (high) to MCU_RESETSTATz inactive (high) | 289000 | ns | |
MCU_PORz Pin | |||||
RST14 | td(MCU_PORz-MCU_PORz_OUT low) | Delay time, MCU_PORz active (low) to MCU_PORz_OUT active (low) | 0 | ns | |
RST15 | td(MCU_PORz-MCU_PORz_OUT high) | Delay time, MCU_PORz inactive (high) to MCU_PORz_OUT inactive (high) | 0 | ns |
Table 6-9 and Figure 6-9 present the boot configuration timing requirements.
NO. | PARAMETER | MIN | MAX | UNIT | |
---|---|---|---|---|---|
BC1 | tsu(BOOTMODE-PORz) | Setup time, All Bootmode pins active to PORz inactive (high) | 2000 | ns | |
BC2 | th(PORz - BOOTMODE) | Hold time, All Bootmode pins active after PORz inactive (high) | 0 | ns | |
BC3 | tsu(MCU_BOOTMODE-MCU_PORz) | Setup time, All Bootmode pins active to MCU_PORz inactive (high) | 2000 | ns | |
BC4 | th(MCU_PORz - MCU_BOOTMODE) | Hold time, All Bootmode pins active after MCU_PORz inactive (high) | 0 | ns |