JAJSSQ0 October   2024 AMC0311S-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information (D Package)
    5. 6.5  Thermal Information (DWV Package)
    6. 6.6  Power Ratings
    7. 6.7  Insulation Specifications (Basic Isolation)
    8. 6.8  Insulation Specifications (Reinforced Isolation)
    9. 6.9  Safety-Related Certifications (Basic Isolation)
    10. 6.10 Safety-Related Certifications (Reinforced Isolation)
    11. 6.11 Safety Limiting Values (D Package)
    12. 6.12 Safety Limiting Values (DWV Package)
    13. 6.13 Electrical Characteristics
    14. 6.14 Switching Characteristics
    15. 6.15 Timing Diagram
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Best Design Practices
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.13 Electrical Characteristics

  typical specifications are at TA = 25°C, VDD1 = 5V, and VDD2 = 3.3V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
CIN Input capacitance TBD pF
RINP Input impedance INP pin, TA = 25℃ 1 GΩ
IIB, INP Input bias current INP pin, INP = GND1, TA = 25℃ –15 3.5 15 nA
CMTI Common-mode transient immunity 50 V/ns
ANALOG OUTPUT
Nominal gain 1 V/V
ROUT Output resistance OUTP or OUTN <0.2 Ω
Output short-circuit current sourcing or sinking,
INP = GND1, output shorted to
either GND2 or VDD2		 14 mA
DC ACCURACY
VOS Input offset voltage(1)(2) VOS = (VOUT – VREFIN),
INP = SNSN = GND1,
VREFIN = 250mV, TA = 25°C		 –1.5 ±0.2 1.5 mV
TCVOS Input offset thermal drift(1)(2)(4) –25 ±4 25 µV/°C
EG Gain error(1) TA = 25℃ –0.25% ±0.05% 0.25%
TCEG Gain error drift(1)(5) –40 ±5 40 ppm/°C
Nonlineartity(1) –0.05% ±0.01% 0.05%
Output noise INP = GND1, BW = 50kHz TBD µVrms
PSRR Power-supply rejection ratio(2) VDD1 DC PSRR, VINP = 250mV,
VDD1 from 3V to 5.5V		 –80 dB
VDD1 AC PSRR, VINP = 250mV,
VDD1 with 10kHz / 100mV ripple		 –65
VDD2 DC PSRR, VINP = 250mV,
VDD2 from 3V to 5.5V		 –85
VDD2 AC PSRR, VINP = 250mV,
VDD2 with 10kHz / 100mV ripple		 –70
AC ACCURACY
BW Output bandwidth 90 110 kHz
THD Total harmonic distortion(3) VINP = 2VPP, VINP > 0V,
fIN = 10kHz		 –78 –69 dB
SNR Signal-to-noise ratio VINP = 2.25VPP, fINP = 1kHz, BW = 10kHz 72 76 dB
VINP = 2.25VPP, fINP = 10kHz, BW = 50kHz 70
POWER SUPPLY
IDD1 High-side supply current 4.2 6.0 mA
IDD2 Low-side supply current 6.0 9.9 mA
VDD1UV High-side undervoltage detection threshold VDD1 rising 2.5 2.6 2.7 V
VDD1 falling  1.9 2.0 2.1
VDD2UV Low-side undervoltage detection threshold VDD2 rising 2.5 2.6 2.7 V
VDD2 falling 1.9 2.0 2.1
(1) The typical value includes one standard deviation (sigma) at nominal operating conditions.
(2) This parameter is input referred.
(3) THD is the ratio of the rms sum of the amplitudes of first five higher harmonics to the amplitude of the fundamental.
(4) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCVOS = (ValueMAX - ValueMIN) / TempRange
(5) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = (ValueMAX - ValueMIN) / (Value(T=25℃) x TempRange) x 106