JAJSIU4B April   2020  – June 2022 AMC1300B-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Shunt Resistor Sizing
        2. 8.2.2.2 Input Filter Design
        3. 8.2.2.3 Differential to Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-20201121-CA0I-VQCN-1MML-H1VCNS1X7KRD-low.gif Figure 5-1 DWV Package,8-Pin SOIC(Top View)
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NO. NAME
1 VDD1 High-side power High-side power supply.(1)
2 INP Analog input Noninverting analog input. Either INP or INN must have a DC current path to GND1 to define the common-mode input voltage.(2)
3 INN Analog input Inverting analog input. Either INP or INN must have a DC current path to GND1 to define the common-mode input voltage.(2)
4 GND1 High-side ground High-side analog ground.
5 GND2 Low-side ground Low-side analog ground.
6 OUTN Analog output Inverting analog output.
7 OUTP Analog output Noninverting analog output.
8 VDD2 Low-side power Low-side power supply.(1)
(1) See the Section 9 section for power-supply decoupling recommendations.
(2) See the Section 10 section for details.