JAJSP46A
May 2023 – September 2023
AMC130M03
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Insulation Specifications
6.6
Safety-Related Certifications
6.7
Safety Limiting Values
6.8
Electrical Characteristics
6.9
Timing Requirements
6.10
Switching Characteristics
6.11
Timing Diagrams
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Noise Measurements
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Isolated DC/DC Converter
8.3.1.1
DC/DC Converter Failure Detection
8.3.2
High-Side Current Drive Capability
8.3.3
Isolation Channel Signal Transmission
8.3.4
Input ESD Protection Circuitry
8.3.5
Input Multiplexer
8.3.6
Programmable Gain Amplifier (PGA)
8.3.7
Voltage Reference
8.3.8
Internal Test Signals
8.3.9
Clocking and Power Modes
8.3.10
ΔΣ Modulator
8.3.11
Digital Filter
8.3.11.1
Digital Filter Implementation
8.3.11.1.1
Fast-Settling Filter
8.3.11.1.2
SINC3 and SINC3 + SINC1 Filter
8.3.11.2
Digital Filter Characteristic
8.3.12
Channel Phase Calibration
8.3.13
Calibration Registers
8.3.14
Register Map CRC
8.3.15
Temperature Sensor
8.3.15.1
Internal Temperature Sensor
8.3.15.2
External Temperature Sensor
8.3.15.3
Clock Selection for Temperature Sensor Operation
8.3.16
General-Purpose Digital Output (GPO)
8.4
Device Functional Modes
8.4.1
Power-Up and Reset
8.4.1.1
Power-On Reset
8.4.1.2
SYNC/RESET Pin
8.4.1.3
RESET Command
8.4.2
Start-Up Behavior After Power-Up
8.4.3
Start-Up Behavior After a Pin Reset or RESET Command
8.4.4
Start-Up Behavior After a Pause in CLKIN
8.4.5
Synchronization
8.4.6
Conversion Modes
8.4.6.1
Continuous-Conversion Mode
8.4.6.2
Global-Chop Mode
8.4.7
Power Modes
8.4.8
Standby Mode
8.5
Programming
8.5.1
Serial Interface
8.5.1.1
Chip Select (CS)
8.5.1.2
Serial Data Clock (SCLK)
8.5.1.3
Serial Data Input (DIN)
8.5.1.4
Serial Data Output (DOUT)
8.5.1.5
Data Ready (DRDY)
8.5.1.6
Conversion Synchronization or System Reset (SYNC/RESET)
8.5.1.7
SPI Communication Frames
8.5.1.8
SPI Communication Words
8.5.1.9
Short SPI Frames
8.5.1.10
Communication Cyclic Redundancy Check (CRC)
8.5.1.11
SPI Timeout
8.5.2
ADC Conversion Data Format
8.5.3
Commands
8.5.3.1
NULL (0000 0000 0000 0000)
8.5.3.2
RESET (0000 0000 0001 0001)
8.5.3.3
STANDBY (0000 0000 0010 0010)
8.5.3.4
WAKEUP (0000 0000 0011 0011)
8.5.3.5
LOCK (0000 0101 0101 0101)
8.5.3.6
UNLOCK (0000 0110 0101 0101)
8.5.3.7
RREG (101a aaaa annn nnnn)
8.5.3.7.1
Reading a Single Register
8.5.3.7.2
Reading Multiple Registers
8.5.3.8
WREG (011a aaaa annn nnnn)
8.5.4
ADC Output Buffer and FIFO Buffer
8.5.5
Collecting Data for the First Time or After a Pause in Data Collection
8.6
AMC130M03 Registers
9
Application and Implementation
9.1
Application Information
9.1.1
Unused Inputs and Outputs
9.1.2
Antialiasing
9.1.3
Minimum Interface Connections
9.1.4
Multiple Device Configuration
9.1.5
Calibration
9.1.6
Troubleshooting
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Voltage Measurement
9.2.2.2
Current Shunt Measurement
9.2.2.3
Temperature Measurement
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DFM|20
MCSS009
サーマルパッド・メカニカル・データ
発注情報
jajsp46a_oa
jajsp46a_pm
8
Detailed Description