JAJSQU7A July 2023 – February 2024 AWRL1432
ADVANCE INFORMATION
Table 7-4 describes the power rails from an external power supply block to the device via a BOM optimized 1.8V I/O topology.
SUPPLY | DEVICE BLOCKS POWERED FROM THE SUPPLY | RELEVANT IOs IN THE DEVICE |
---|---|---|
1.8 V | Synthesizer and APLL VCOs, crystal oscillator, IF Amplifier stages, ADC, Digital I/Os | Input: VIOIN, VDDA_18VCO, VIOIN_18CLK, VIOIN_18, VDDA_18BB, VIN_18PM, VDDA_18VCO LDO Output: VDD, VDD_SRAM, VDDA_10RF, VDDA_12RF, VOUT_14APLL, VOUT_14SYNTH |