JAJSQU7B July 2023 – June 2024 AWRL1432
PRODUCTION DATA
As soon as device reset is de-asserted, the processor of the APPSS starts executing its bootloader from an on-chip ROM memory.
The bootloader operates in three basic modes and these are specified on the user hardware (Printed Circuit Board) by configuring what are termed as "Sense on power" (SOP) pins. These pins on the device boundary are scanned by the bootloader firmware and choice of mode for bootloader operation is made.
Table 8-3 enumerates the relevant SOP combinations and how these map to bootloader operation.
SOP1 | SOP0 | BOOTLOADER MODE AND OPERATION |
0 | 0 | Flashing Mode Device Bootloader spins in loop to allow flashing of user application (or device firmware patch - Supplied by TI) to the serial flash. |
0 | 1 | Functional Mode Device Bootloader loads user application from QSPI Serial Flash to internal RAM and switches the control to it. |
1 | 1 | Debug Mode Bootloader is bypassed and M4F processor is halted. This allows user to connect emulator at a known point. |