JAJSQU7B July 2023 – June 2024 AWRL1432
PRODUCTION DATA
Table 7-1 describes the power rails from an external power supply block to the device via a 3.3V I/O topology.
SUPPLY | DEVICE BLOCKS POWERED FROM THE SUPPLY | RELEVANT IOs IN THE DEVICE |
---|---|---|
3.3 V | Digital I/Os | Input: VIOIN |
1.8 V | Synthesizer and APLL VCOs, crystal oscillator, IF Amplifier stages, ADC | Input: VDDA_18VCO,
VIOIN_18CLK, VDDA_18BB, VIOIN_18, VIN_18PM LDO Output: VOUT_14SYNTH, VOUT_14APLL |
1.2 V | Core Digital and SRAMs, RF | Input: VDD, VNWA,
VDD_SRAM, VDDA_12RF LDO Output: VDDA_10RF |