JAJSE06A October   2017  – December 2017

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
    2. 7.1 EN1/EN2 Settings
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Dissipation Ratings
    6. 8.6 Electrical Characteristics
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Power On
      3. 9.3.3 Overvoltage Protection (OVP)
      4. 9.3.4 Dynamic Power-Path Management
        1. 9.3.4.1 Input Source Connected (ADAPTER or USB)
          1. 9.3.4.1.1 Input DPM Mode (VIN-DPM)
          2. 9.3.4.1.2 DPPM Mode
          3. 9.3.4.1.3 Battery Supplement Mode
        2. 9.3.4.2 Input Source Not Connected
      5. 9.3.5 Battery Charging
        1. 9.3.5.1 Charge Current Translator
        2. 9.3.5.2 Battery Detection and Recharge
        3. 9.3.5.3 Battery Disconnect (SYSOFF Input, bq24076, bq24078)
        4. 9.3.5.4 Dynamic Charge Timers (TMR Input)
        5. 9.3.5.5 Status Indicators (PGOOD, CHG)
        6. 9.3.5.6 Thermal Regulation and Thermal Shutdown
      6. 9.3.6 Battery Pack Temperature Monitoring
    4. 9.4 Device Functional Modes
      1. 9.4.1 Sleep Mode
      2. 9.4.2 Explanation of Deglitch Times and Comparator Hysteresis
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 bq2407x Charger Design Example
          1. 10.2.2.1.1 System ON/OFF (SYSOFF) (bq24076 or bq24078 only)
        2. 10.2.2.2 Calculations
          1. 10.2.2.2.1 Program the Fast Charge Current (ISET):
          2. 10.2.2.2.2 Program the Input Current Limit (ILIM)
          3. 10.2.2.2.3 Program 6.25-hour Fast-Charge Safety Timer (TMR)
        3. 10.2.2.3 TS Function
        4. 10.2.2.4 CHG and PGOOD
        5. 10.2.2.5 Selecting IN, OUT, and BAT Pin Capacitors
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 関連リンク
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.6 Electrical Characteristics

Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
INPUT
UVLO Undervoltage lock-out VIN: 0 V → 4 V 3.2 3.3 3.4 V
Vhys Hysteresis on UVLO VIN: 4 V → 0 V 200 300 mV
VIN(DT) Input power detection threshold Input power detected when VIN > VBAT + VIN(DT)
VBAT = 3.6 V, VIN: 3.5 V → 4 V		 55 80 130 mV
Vhys Hysteresis on VIN(DT) VBAT = 3.6 V, VIN: 4 V → 3.5 V 20 mV
tDGL(PGOOD) Deglitch time, input power detected status Time measured from VIN: 0 V → 5 V 1 μs
rise-time to PGOOD = LO		 1.2 ms
VOVP Input overvoltage protection threshold VIN: 5 V → 7 V 6.4 6.6 6.8 V
Vhys Hysteresis on OVP VIN: 7 V → 5V 110 mV
tDGL(OVP) Input overvoltage blanking time (OVP fault deglitch) 50 μs
tREC Input overvoltage recovery time Time measured from VIN: 11 V → 5 V with 1 μs
fall-time to PGOOD = LO		 1.2 ms
ILIM, ISET SHORT-CIRCUIT DETECTION (CHECKED DURING STARTUP)
ISC Current source VIN > UVLO and VIN > VBAT + VIN(DT) 1.3 mA
VSC VIN > UVLO and VIN > VBAT + VIN(DT) 520 mV
QUIESCENT CURRENT
IBAT(PDWN) Sleep current into BAT pin CE = LO or HI, input power not detected,
No load on OUT pin, TJ = 85°C		 4.1 7 μA
IIN Standby current into IN pin EN1= HI, EN2=HI, VIN = 6 V, TJ < 85°C 39 50 μA
EN1= HI, EN2=HI, VIN = 10 V, TJ < 85°C 91 200
ICC Active supply current, IN pin CE = LO, VIN = 6 V, no load on OUT pin,
VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI)		 1.5 mA
POWER PATH
VDO(IN-OUT) VIN – VOUT VIN = 4.3 V, IIN = 1 A, VBAT = 4.2 V 300 475 mV
VDO(BAT-OUT) VBAT – VOUT IOUT = 1 A, VIN = 0 V, VBAT > 3 V 50 100 mV
VO(REG) OUT pin voltage regulation VIN > VOUT + VDO(IN-OUT), VBAT < 3.2 V 3.31 3.41 3.51 V
VIN > VOUT + VDO(IN-OUT), VBAT ≥ 3.2 V VBAT + 145mV VBAT + 210mV VBAT + 275mV
IINmax Maximum input current EN1 = LO, EN2 = LO 90 95 100 mA
EN1 = HI, EN2 = LO 450 475 500
EN2 = HI, EN1 = LO KILIM/RILIM A
KILIM Maximum input current factor ILIM = 500 mA to 1.5 A 1500 1610 1720 AΩ
ILIM = 200 mA to 500 mA 1330 1525 1720
IINmax Programmable input current limit range EN2 = HI, EN1 = LO, RILIM = 8 kΩ to 1.1 kΩ 200 1500 mA
VIN-DPM Input voltage threshold when input current is reduced EN2 = LO, EN1 = X 4.35 4.5 4.63 V
VDPPM Output voltage threshold when charging current is reduced VBAT + 125mV VBAT + 100mV VBAT + 85mV V
VBSUP1 Enter battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 10 Ω → 2 Ω VOUT ≤ VBAT –40mV V
VBSUP2 Exit battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 2 Ω → 10 Ω VOUT ≥ VBAT–20mV V
VO(SC1) Output short-circuit detection threshold, power-on VIN > VUVLO and VIN > VBAT + VIN(DT) 0.8 0.9 1 V
VO(SC2) Output short-circuit detection threshold, supplement mode VBAT – VOUT > VO(SC2) indicates short-circuit VIN > VUVLO and VIN > VBAT + VIN(DT) 200 250 300 mV
tDGL(SC2) Deglitch time, supplement mode short circuit 250 μs
tREC(SC2) Recovery time, supplement mode short circuit 60 ms
BATTERY CHARGER
IBAT Source current for BAT pin short-circuit detection VBAT = 1.5 V 4 7.5 11 mA
VBAT(SC) BAT pin short-circuit detection threshold VBAT rising 1.6 1.8 2 V
VBAT(REG) Battery charge voltage ('76) 4.358 4.4 4.44 V
('78) 4.31 4.35 4.39
VLOWV Pre-charge to fast-charge transition threshold VIN > VUVLO and VIN > VBAT + VIN(DT) 2.9 3 3.1 V
tDGL1(LOWV) Deglitch time on pre-charge to fast-charge transition 25 ms
tDGL2(LOWV) Deglitch time on fast-charge to pre-charge transition 25 ms
ICHG Battery fast charge current range VBAT(REG) > VBAT > VLOWV, VIN = 5 V CE = LO,
EN1 = LO, EN2 = HI 		100 1500 mA
Battery fast charge current CE = LO, EN1= LO, EN2 = HI,
VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load on OUT pin, thermal loop and DPPM loop not active		 KISET/RISET A
KISET Fast charge current factor 797 890 975 AΩ
IPRECHG Pre-charge current KPRECHG/RISET A
KPRECHG Pre-charge current factor 60 88 118 AΩ
ITERM Termination comparator detection threshold (internally set) CE = LO, (EN1, EN2) ≠ (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal loop not active 		0.09×ICHG 0.1×ICHG 0.11×ICHG A
CE = LO, (EN1, EN2) = (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal loop not active 		0.027×ICHG 0.033×ICHG 0.040×ICHG
IBIAS(ITERM) Current for external termination-setting resistor VIN > VUVLO and VIN > VBAT + VIN(DT) 72 75 78 μA
tDGL(TERM) Deglitch time, termination detected 25 ms
VRCH Recharge detection threshold VIN > VUVLO and VIN > VBAT + VIN(DT) VBAT(REG) –140mV VBAT(REG) –100mV VBAT(REG) –60mV V
tDGL(RCH) Deglitch time, recharge threshold detected 62.5 ms
tDGL(NO-IN) Delay time, input power loss to OUT LDO turn-off VBAT = 3.6 V. Time measured from
VIN: 5 V → 3 V 1 μs fall-time		 20 ms
IBAT(DET) Sink current for battery detection VBAT = 2.5 V 5 7.5 10 mA
tDET Battery detection timer BAT high or low 250 ms
BATTERY CHARGING TIMERS
tPRECHG Pre-charge safety timer value TMR = floating 1440 1800 2160 s
tMAXCHG Charge safety timer value TMR = floating 14400 18000 21600 s
tPRECHG Pre-charge safety timer value 18 kΩ < RTMR < 72 kΩ RTMR × KTMR s
tMAXCHG Charge safety timer value 18 kΩ < RTMR < 72 kΩ 10×RTMR ×KTMR s
KTMR Timer factor 36 48 60 s/kΩ
BATTERY-PACK NTC MONITOR(1)
INTC NTC bias current VIN > UVLO and VIN > VBAT + VIN(DT) 72 75 80 μA
VHOT High temperature trip point Battery charging, VTS Falling 270 300 330 mV
VHYS(HOT) Hysteresis on high trip point Battery charging, VTS Rising from VHOT 30 mV
VCOLD Low temperature trip point Battery charging, VTS Rising 2000 2100 2200 mV
VHYS(COLD) Hysteresis on low trip point Battery charging, VTS Falling from VCOLD 300 mV
tDGL(TS) Deglitch time, pack temperature fault detection TS fault detected to charger disable 50 ms
VDIS(TS) TS function disable threshold TS unconnected VIN - 200mV V
THERMAL REGULATION
TJ(REG) Temperature regulation limit 125 °C
TJ(OFF) Thermal shutdown temperature TJ Rising 155 °C
TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD
VIL Logic LOW input voltage 0 0.4 V
VIH Logic HIGH input voltage 1.4 6 V
IIL Input sink current VIL= 0 V 1 μA
IIH Input source current VIH= 1.4 V 10 μA
LOGIC LEVELS ON PGOOD, CHG
VOL Output LOW voltage ISINK = 5 mA 0.4 V
(1) These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC with an R25 of 10 kΩ.