JAJSE21B October   2017  – November 2018

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     代表的なアプリケーション回路
  4. 改訂履歴
  5. 概要(続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Power On
      3. 9.3.3 Overvoltage Protection (OVP)
      4. 9.3.4 Dynamic Power-path Management
        1. 9.3.4.1 Input Source Connected (Adapter or USB)
          1. 9.3.4.1.1 Input DPM Mode (VIN-DPM)
          2. 9.3.4.1.2 DPPM Mode
          3. 9.3.4.1.3 Battery Supplement Mode
        2. 9.3.4.2 Input Source Not Connected
      5. 9.3.5 Battery Charging
        1. 9.3.5.1 Charge Current Translator
        2. 9.3.5.2 Battery Detection And Recharge
        3. 9.3.5.3 Battery Disconnect (SYSOFF Input)
        4. 9.3.5.4 Dynamic Charge Timers (TMR Input)
        5. 9.3.5.5 Status Indicators (PGOOD, CHG)
        6. 9.3.5.6 Thermal Regulation And Thermal Shutdown
      6. 9.3.6 Battery Pack Temperature Monitoring
      7. 9.3.7 Half-Wave Adaptors
    4. 9.4 Device Functional Modes
      1. 9.4.1 Sleep Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application – bq24079QW-Q1 Charger Design Example
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Calculations
          1. 10.2.2.1.1 Program the Fast Charge Current (ISET):
          2. 10.2.2.1.2 Program the Input Current Limit (ILIM)
          3. 10.2.2.1.3 Program 6.25-hour Fast-Charge Safety Timer (TMR)
        2. 10.2.2.2 TS Function
        3. 10.2.2.3 CHG and PGOOD
        4. 10.2.2.4 System ON/OFF (SYSOFF)
        5. 10.2.2.5 Selecting In, Out And Bat Pin Capacitors
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Package
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • RGT|16
サーマルパッド・メカニカル・データ
発注情報

Thermal Package

The bq24079QW-Q1 is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application Note (SLUA271). The most common measure of package thermal performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is:

θJA = (TJ - T) / P

Where:

TJ = chip junction temperature

T = ambient temperature

P = device power dissipation

Factors that can influence the measurement and calculation of θJA include:

  1. Whether or not the device is board mounted
  2. Trace size, composition, thickness, and geometry
  3. Orientation of the device (horizontal or vertical)
  4. Volume of the ambient air surrounding the device under test and airflow
  5. Whether other surfaces are in close proximity to the device being tested

Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of time. The fast charge current will start to taper off if the part goes into thermal regulation.

The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged :

P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)

The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop is always active.