JAJSE21B October   2017  – November 2018

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Power On
      3. 9.3.3 Overvoltage Protection (OVP)
      4. 9.3.4 Dynamic Power-path Management
        1. 9.3.4.1 Input Source Connected (Adapter or USB)
          1. 9.3.4.1.1 Input DPM Mode (VIN-DPM)
          2. 9.3.4.1.2 DPPM Mode
          3. 9.3.4.1.3 Battery Supplement Mode
        2. 9.3.4.2 Input Source Not Connected
      5. 9.3.5 Battery Charging
        1. 9.3.5.1 Charge Current Translator
        2. 9.3.5.2 Battery Detection And Recharge
        3. 9.3.5.3 Battery Disconnect (SYSOFF Input)
        4. 9.3.5.4 Dynamic Charge Timers (TMR Input)
        5. 9.3.5.5 Status Indicators (PGOOD, CHG)
        6. 9.3.5.6 Thermal Regulation And Thermal Shutdown
      6. 9.3.6 Battery Pack Temperature Monitoring
      7. 9.3.7 Half-Wave Adaptors
    4. 9.4 Device Functional Modes
      1. 9.4.1 Sleep Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application – bq24079QW-Q1 Charger Design Example
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Calculations
          1. 10.2.2.1.1 Program the Fast Charge Current (ISET):
          2. 10.2.2.1.2 Program the Input Current Limit (ILIM)
          3. 10.2.2.1.3 Program 6.25-hour Fast-Charge Safety Timer (TMR)
        2. 10.2.2.2 TS Function
        3. 10.2.2.3 CHG and PGOOD
        4. 10.2.2.4 System ON/OFF (SYSOFF)
        5. 10.2.2.5 Selecting In, Out And Bat Pin Capacitors
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Package
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGT|16
サーマルパッド・メカニカル・データ
発注情報

7 Pin Configuration and Functions

RGT Package
16 Pin VQFN
Top View
bq24079QW-Q1 RGT2.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
TS 1 I External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-kΩ NTC thermistor. For applications that do not utilize the TS function, connect a 10-kΩ fixed resistor from TS to VSS to maintain a valid voltage level on TS. Do not leave TS pin floating.
BAT 2, 3 I/O Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery. Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
CE 4 I Charge Enable Active-Low Input. Connect CE to a high logic level to suspend charging. When CE is high, OUT is active and battery supplement mode is still available. Connect CE to a low logic level to enable the battery charger. CE is internally pulled down with ~285 kΩ. Do not leave CE unconnected to ensure proper operation.
EN2 5 I Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB compliance. See EN1/EN2 Settings table for the description of the operation states. EN1 and EN2 are internally pulled down with ≉285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
EN1 6 I
PGOOD 7 O Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
VSS 8 – Ground. Connect to the thermal pad and to the ground rail of the circuit.
CHG 9 O Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance when charging is complete and when charger is disabled. Connect CHG to the desired logic voltage rail using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
OUT 10, 11 O System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT except when SYSOFF is high. Connect OUT to the system load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
ILIM 12 I Adjustable Current Limit Programming Input. Connect a 1100-Ω to 8-kΩ resistor from ILIM to VSS to program the maximum input current (EN2 = 1, EN1 = 0). The input current includes the system load and the battery charge current. Leaving ILIM unconnected disables all charging.
IN 13 I Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input operating range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is suspended. Connect bypass capacitor 1 μF to 10 μF to VSS.
TMR 14 I Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to VSS to disable all safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a desired length. Leave TMR unconnected to set the timers to the default values.
SYSOFF 15 I System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system output. When an adapter is connected, charging is also disabled. Connect SYSOFF low for normal operation. SYSOFF is internally pulled up to VBAT through a large resistor (~5 MΩ). Do not leave SYSOFF unconnected to ensure proper operation.
ISET 16 I/O Fast Charge Current Programming Input. Connect a 590-Ω to 8.9-kΩ resistor from ISET to VSS to program the fast charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual charging current and can be used to monitor charge current. See the Charge Current Translator section for more details.
Thermal Pad – – There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times.