SLUSAB0D October   2010  – April 2016

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Device Comparisons
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Voltage Protection
        1. 9.3.1.1 Input Overvoltage Protection
        2. 9.3.1.2 Bad Adaptor Detection/Rejection
        3. 9.3.1.3 Sleep Mode
        4. 9.3.1.4 Input Voltage Based DPM (Special Charger Voltage Threshold)
      2. 9.3.2 Battery Protection
        1. 9.3.2.1 Output Overvoltage Protection
        2. 9.3.2.2 Battery Short Protection
        3. 9.3.2.3 Battery Detection at Power Up in 15-minute Mode (bq24153A/6A only)
        4. 9.3.2.4 Battery Detection in Host Mode
      3. 9.3.3 15-Minute Safety Timer and 32-second Watchdog Timer in Charge Mode
      4. 9.3.4 USB Friendly Power Up
      5. 9.3.5 Input Current Limiting at Power Up
    4. 9.4 Device Functional Modes
      1. 9.4.1 Charge Mode Operation
        1. 9.4.1.1 Charge Profile
      2. 9.4.2 PWM Controller in Charge Mode
      3. 9.4.3 Battery Charging Process
      4. 9.4.4 Thermal Regulation and Protection
      5. 9.4.5 Charge Status Output, STAT Pin
      6. 9.4.6 Control Bits in Charge Mode
        1. 9.4.6.1 CE Bit (Charge Mode)
        2. 9.4.6.2 RESET Bit
        3. 9.4.6.3 OPA_Mode Bit
      7. 9.4.7 Control Pins in Charge Mode
        1. 9.4.7.1 CD Pin (Charge Disable)
        2. 9.4.7.2 SLRST Pin (Safety Limit Register 06H Reset, bq24156A/9 only)
      8. 9.4.8 BOOST Mode Operation (bq24153A/8 only)
        1. 9.4.8.1 PWM Controller in Boost Mode
        2. 9.4.8.2 Boost Start Up
        3. 9.4.8.3 PFM Mode at Light Load
        4. 9.4.8.4 Safety Timer in Boost Mode
        5. 9.4.8.5 Protection in Boost Mode
          1. 9.4.8.5.1 Output Overvoltage Protection
          2. 9.4.8.5.2 Output Overload Protection
          3. 9.4.8.5.3 Battery Overvoltage Protection
        6. 9.4.8.6 STAT Pin in Boost Mode
      9. 9.4.9 High Impedance (HI-Z) Mode
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description
        1. 9.5.1.1 F/S Mode Protocol
        2. 9.5.1.2 H/S Mode Protocol
        3. 9.5.1.3 I2C Update Sequence
        4. 9.5.1.4 Slave Address Byte
        5. 9.5.1.5 Register Address Byte
    6. 9.6 Register Maps
      1. 9.6.1 Status/Control Register [Memory Location: 00, Reset State: x1xx 0xxx]
      2. 9.6.2 Control Register [Memory Location: 01, Reset State: 0011 0000]
      3. 9.6.3 Control/Battery Voltage Register [Memory Location: 02, Reset State: 0000 1010]
      4. 9.6.4 Vender/Part/Revision Register [Memory Location: 03, Reset State: 0101 000x]
      5. 9.6.5 Battery Termination/Fast Charge Current Register [Memory Location: 04, Reset State: 0000 000]
      6. 9.6.6 Special Charger Voltage/Enable Pin Status Register [Memory location: 05, Reset state: 001X X100]
      7. 9.6.7 Safety Limit Register [Memory location: 06, Reset state: 01000000]
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Systems Design Specifications
        2. 10.2.2.2 Charge Current Sensing Resistor Selection Guidelines
        3. 10.2.2.3 Output Inductor and Capacitance Selection Guidelines
      3. 10.2.3 Application Curves
    3. 10.3 System Example
  11. 11Power Supply Recommendations
    1. 11.1 System Load After Sensing Resistor
    2. 11.2 System Load Before Sensing Resistor
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Current Path
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Summary
      1. 14.1.1 Chip Scale Packaging Dimensions

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

14.1 Package Summary

bq24153A bq24156A bq24158 bq24159 pac_sum159_lusab0.gif
bq24153A bq24156A bq24158 bq24159 pkg_dimen_lusab0.gif

14.1.1 Chip Scale Packaging Dimensions

The bq24153A/6A/8/9 devices are available in a 20-bump chip scale package (YFF, NanoFree™).

The package dimensions are:

D E
Max = 2.17mm Max = 2.03 mm
Min = 2.11 mm Min = 1.97 mm