SLUSBV8C August   2014  – November 2014

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Overvoltage-Protection (OVP) - Continuously Monitored
      2. 8.3.2  CHG Pin Indication (bq25101, bq25101H)
      3. 8.3.3  CHG Pin LED Pull-up Source (bq25101, bq25101H)
      4. 8.3.4  IN-DPM (VIN-DPM or IN-DPM)
      5. 8.3.5  OUT
      6. 8.3.6  ISET
      7. 8.3.7  PRE_TERM - Pre-Charge and Termination Programmable Threshold
      8. 8.3.8  TS
      9. 8.3.9  Timers
      10. 8.3.10 Termination
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Down or Undervoltage Lockout (UVLO)
      2. 8.4.2 Power-up
      3. 8.4.3 Sleep Mode
      4. 8.4.4 New Charge Cycle
      5. 8.4.5 Termination and Timer Disable Mode (TTDM) - TS Pin High
      6. 8.4.6 Battery Detect Routine
      7. 8.4.7 Refresh Threshold
      8. 8.4.8 Starting a Charge on a Full Battery
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Charger Application Design Example
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 Calculations
          1. 9.2.2.1.1 Program the Fast Charge Current, ISET:
          2. 9.2.2.1.2 Program the Termination Current Threshold, ITERM:
          3. 9.2.2.1.3 TS Function
          4. 9.2.2.1.4 Selecting IN and OUT Pin Capacitors
      3. 9.2.3 bq25100 Application Performance Plots
  10. 10Power Supply Recommendations
    1. 10.1 Leakage Current Effects on Battery Capacity
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Package
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

To obtain optimal performance, the decoupling capacitor from IN to GND and the output filter capacitors from OUT to GND should be placed as close as possible to the bq2510x, with short trace runs to both IN, OUT and GND.

  • All low-current GND connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path.
  • The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces

11.2 Layout Example

layout_ex2_lusbv8.pngFigure 26. Board Layout

11.3 Thermal Package

The most common measure of package thermal performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is:

Equation 3. θJA = (TJ – T) / P

Where:

TJ = chip junction temperature
T = ambient temperature
P = device power dissipation

Factors that can influence the measurement and calculation of θJA include:

  1. Whether or not the device is board mounted
  2. Trace size, composition, thickness, and geometry
  3. Orientation of the device (horizontal or vertical)
  4. Volume of the ambient air surrounding the device under test and airflow
  5. Whether other surfaces are in close proximity to the device being tested

Due to the charge profile of Li-Ion and Li-Pol batteries the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to use.

The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged :

Equation 4. P = [V(IN) – V(OUT)] × I(OUT)

The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop is always active.