JAJSJR6A december   2020  – august 2023 BQ25157

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 概要 (続き)
  7. 6 Device Key Default Settings
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Linear Charger and Power Path
        1. 9.3.1.1 Battery Charging Process
          1. 9.3.1.1.1 Pre-Charge
          2. 9.3.1.1.2 Fast Charge
          3. 9.3.1.1.3 Pre-Charge to Fast Charge Transitions and Charge Current Ramping
          4. 9.3.1.1.4 Termination
        2. 9.3.1.2 JEITA and Battery Temperature Dependent Charging
        3. 9.3.1.3 Input Voltage Based Dynamic Power Management (VINDPM) and Dynamic Power Path Management (DPPM)
        4. 9.3.1.4 Battery Supplement Mode
      2. 9.3.2  Protection Mechanisms
        1. 9.3.2.1 Input Over-Voltage Protection
        2. 9.3.2.2 Safety Timer and I2C Watchdog Timer
        3. 9.3.2.3 Thermal Protection and Thermal Charge Current Foldback
        4. 9.3.2.4 Battery Short and Over Current Protection
        5. 9.3.2.5 PMID Short Circuit
      3. 9.3.3  ADC
        1. 9.3.3.1 ADC Operation in Active Battery Mode and Low Power Mode
        2. 9.3.3.2 ADC Operation When VIN Present
        3. 9.3.3.3 ADC Measurements
        4. 9.3.3.4 ADC Programmable Comparators
      4. 9.3.4  VDD LDO
      5. 9.3.5  Load Switch/LDO Output and Control
      6. 9.3.6  PMID Power Control
      7. 9.3.7  MR Wake and Reset Input
        1. 9.3.7.1 MR Wake or Short Button Press Functions
        2. 9.3.7.2 MR Reset or Long Button Press Functions
      8. 9.3.8  14-Second Watchdog for HW Reset
      9. 9.3.9  Faults Conditions and Interrupts ( INT)
        1. 9.3.9.1 Flags and Fault Condition Response
      10. 9.3.10 Power Good ( PG) Pin
      11. 9.3.11 External NTC Monitoring (TS)
        1. 9.3.11.1 TS Thresholds
      12. 9.3.12 External NTC Monitoring (ADCIN)
      13. 9.3.13 I2C Interface
        1. 9.3.13.1 F/S Mode Protocol
    4. 9.4 Device Functional Modes
      1. 9.4.1 Ship Mode
      2. 9.4.2 Low Power
      3. 9.4.3 Active Battery
      4. 9.4.4 Charger/Adapter Mode
      5. 9.4.5 Power-Up/Down Sequencing
    5. 9.5 Register Map
      1. 9.5.1 I2C Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Input (IN/PMID) Capacitors
        2. 10.2.2.2 VDD, LDO Input and Output Capacitors
        3. 10.2.2.3 TS
        4. 10.2.2.4 Recommended Passive Components
      3. 10.2.3 Application Curves
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 サード・パーティ製品に関する免責事項
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 サポート・リソース
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Trademarks
    7. 13.7 用語集
  15. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.5 Electrical Characteristics

VIN = 5V, VBAT = 3.6V. -40°C < TJ < 125°C unless otherwise noted. Typical data at TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CURRENTS
IIN Input supply current PMID_MODE = 01, VIN = 5V, VBAT = 3.6V 500 µA
0°C <TJ < 85°C , VIN = 5V, VBAT = 3.6V Charge Disabled 2 mA
IBAT_SHIP Battery Discharge Current in Ship Mode 0°C <TJ < 60°C ,VIN = 0V , VBAT = 3.6V 10 150 nA
IBAT_LP Battery Quiescent Current in Low-power Mode 0°C <TJ < 60°C ,VIN = 0V , VBAT = 3.6V, LDO Disabled 0.46 1.2 µA
0°C <TJ < 60°C ,VIN = 0V , VBAT = 3.6V, LDO Enabled 1.7 3.5 µA
IBAT_ACTIVE Battery Quiescent Current in Active Mode 0°C <TJ < 85°C ,VIN = 0V , VBAT = 3.6V, LDO Disabled 18 25 µA
0°C <TJ < 85°C ,VIN = 0V , VBAT = 3.6V, LDO Enabled 21 27 µA
POWER PATH MANAGEMENT AND INPUT CURRENT LIMIT
RON(IN-PMID) Input FET ON resistance IILIM = 500mA (ILIM = 110), VIN = 5V, IIN = 150mA 280 520 mΩ
VBSUP1 Enter supplements mode threshold VBAT > VBATUVLO, DPPM enabled or Charge disabled VPMID < VBAT – 40mV mV
VBSUP2 Exit supplements mode threshold VBAT > VBATUVLO, DPPM enabled or Charge disabled VPMID < VBAT – 20mV mV
IILIM Input Current Limit Programmable Range 50 600 mA
IILIM = 50mA 45 50 mA
IILIM = 100mA 90 100 mA
IILIM = 150mA 135 150 mA
IILIM = 500mA 450 500 mA
VIN_DPM Input DPM voltage threshold where current in reduced Programmable Range 4.2 4.9 V
Accuracy –3 3 %
BATTERY CHARGER
VDPPM PMID voltage threshold when charge current is reduced VPMID - VBAT 200 mV
RON(BAT-PMID) Battery Discharge FET On Resistance VBAT = 4.35V, IBAT = 100mA 100 135 mΩ
VBATREG Charge Voltage Programmable charge voltage range 3.6 4.6 V
Voltage Regulation Accuracy 0.5 0.5 %
ICHARGE Fast Charge Programmable Current Range VLOWV < VBAT < VBATREG 1.25 500 mA
Fast Charge Current Accuracy TJ = 25°C, ICHARGE > 5mA –5 5 %
IPRECHARGE Precharge current Precharge current programmable range 1.25 77.5 mA
Precharge Current Accuracy -40°C < TJ < 85°C –10 10 %
ITERM Termination Charge Current Termination Current Programmable Range 1 31 %
Accuracy TJ = 25°C, ITERM = 10% ICHARGE, ICHARGE = 100mA –5 5 %
-10°C < TJ < 85°C, ITERM = 10% ICHARGE, ICHARGE = 100mA –10 10 %
VLOWV Programmable voltage threshold for pre-charge to fast charge transitions VBAT rising. Programmable Range 2.8 3 V
VSHORT Battery voltage threshold for short detection VBAT falling, VIN = 5V 2.41 2.54 2.67 V
ISHORT Charge Current in Battery Short Condition VBAT < VSHORT IPRECHARGE mA
VRCH Recharge Threshold voltage VBAT falling, VBATREG = 4.2V, VRCH = 140mV setting 140 mV
VBAT falling, VBATREG = 4.2V, VRCH = 200mV setting 200 mV
RPMID_PD PMID pull-down resistance VPMID = 3.6V 25 Ω
VDD
VDD VDD LDO output voltage VBAT = 3.6V, VIN = 0V, 0 < ILOAD_VDD < 10mA 1.8 V
ILOAD_VDD Maximum VDD External load capability VPMID > 3V 10 mA
LS/LDO
VINLS Input voltage range for Load switch Mode 0.8 6.2 V
Input voltage range for LDO Mode 2.2 or VLDO + 500mV 6.2 V
VLDO LDO programmable output voltage range 0.6 3.7 V
LDO output accuracy TJ = 25°C –2 2 %
VLDO = 1.8V, VINLS =3.6V. ILOAD = 1mA –3 3 %
ΔVOUT/ΔIOUT DC Load Regulation 0°C < TJ < 85°C, 1 mA < IOUT < 150mA, VLDO = 1.8V 1.2 %
ΔVOUT/ΔVIN DC Line Regulation 0°C < TJ < 85°C, Over VINLS range, IOUT = 100mA, VLDO = 1.8V 0.5 %
RDOSN_LDO Switch On resistance VINLS = 3.6V 250 450 mΩ
RDSCH_LSLDO Discharge FET On-resistance for LS VINLS = 3.6V 40 Ω
IOCL_LDO Output Current Limit VLS/LDO = 0V 200 300 mA
IIN_LDO LDO VINLS quiescent current in LDO mode VBAT = VINLS=3.6V 0.9 µA
OFF State Supply Current VBAT = VINLS=3.6V 0.25 µA
ADC
Resolution Bits reported by ADC 16 Bits
tADC_CONV Conversion-time ADC_SPEED = 00 24 ms
ADC_SPEED = 01 12 ms
ADC_SPEED = 10 6 ms
ADC_SPEED = 11 3 ms
Resolution Effective Resolution ADC_SPEED = 00 12 Bits
ADC_SPEED = 10 10 Bits
Accuracy ADC TS Accuracy ADC_SPEED = 00, VTS = 0.4V, -10°C < TJ < 85°C –1 1 %
ADC ADCIN Accuracy ADC_SPEED = 00, VADCIN = 0.4V, -10°C < TJ < 85°C –1 1 %
ADC VBAT Accuracy ADC_SPEED = 00, VBAT = 4.2V, -10°C < TJ < 85°C –0.4 0.4 %
BATTERY PACK NTC MONITOR
VHOT High temperature threshold VTS falling, -10°C < TJ < 85°C 0.182 0.185 0.189 V
VWARM Warm temperature threshold VTS falling, -10°C < TJ < 85°C 0.262 0.265 0.268 V
VCOOL Cool temperature threshold VTS rising, -10°C < TJ < 85°C 0.510 0.514 0.518 V
VCOLD Cold temperature threshold VTS rising, -10°C < TJ < 85°C 0.581 0.585 0.589 V
VOPEN TS Open threshold VTS rising, -10°C < TJ < 85°C 0.9 V
VHYS Threshold hysteresis 4.7 mV
ITS_BIAS TS bias current -10°C < TJ < 85°C 78.4 80 81.6 µA
PROTECTION
VUVLO IN active threshold voltage VIN rising 3.4 V
VIN falling 3.25 V
VBATUVLO Battery undervoltage Lockout Threshold Voltage Programmable range, 150 mV Hysteresis 2.4 3 V
Accuracy –3 3 %
Battery undervoltage Lockout Threshold Voltage at Power Up VBAT rising, VIN = 0V, TJ = 25°C 3.15 V
VSLP_ENTRY Sleep Entry Threshold (VIN - VBAT) 2.0V < VBAT < VBATREG, VIN falling 80 mV
VSLP_EXIT Sleep Exit Threshold (VIN - VBAT) 2.0V < VBAT < VBATREG 130 mV
VOVP Input Supply Over Voltage Threshold VIN rising

6.05

6.2

6.5

 V
VIN falling (125mV hysteresis)

6.1

 V
IBAT_OCP Battery Over Current Threshold Programmable range IBAT_OCP increasing 1200 1600 mA
Current Limit Accuracy –30 30 %
TSHUTDOWN Thermal shutdown trip point 125 °C
THYS Thermal shutdown trip point hysteresis 15 °C
I2C INTERFACE (SCL and SDA)
I2C Frequency 100 400 kHz
VIL Input Low threshold level VPULLUP = VIO = 1.8V 0.25 * VIO V
VIH Input High Threshold level VPULLUP = VIO = 1.8V 0.75 * VIO V
VOL Output Low threshold level VPULLUP = VIO = 1.8V, ILOAD = 5mA 0.25 * VIO V
ILKG High-level leakage Current VPULLUP = VIO = 1.8V 1 µA
/MR INPUT
RPU Internal pull up resistance 90 125 170 kΩ
VIL /MR Input Low threshold level VBAT > VBUVLO 0.3 V
/INT, /PG OUTPUTS
VOL Output Low threshold level VPULLUP = VIO = 1.8V, ILOAD = 5mA 0.25 * VIO V
ILKG /INT Hi level leakage Current High Impedance, VPULLUP = VIO = 1.8V 1 µA
/CE, /LP INPUTS
RPDOWN /CE pull down resistance 900 kΩ
VIL Input Low threshold level VIO = 1.8V 0.45 V
VIH /CE Input High Threshold level VIO = 1.8V 1.35 V