JAJSND8C September   2021  – January 2023 BQ25180

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Battery Charging Process
        1. 8.1.1.1 Trickle Charge
        2. 8.1.1.2 Precharge
        3. 8.1.1.3 Fast Charge
        4. 8.1.1.4 Termination
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage Based Dynamic Power Management (VINDPM)
      2. 8.3.2  Dynamic Power Path Management Mode (DPPM)
      3. 8.3.3  Battery Supplement Mode
      4. 8.3.4  SYS Power Control (SYS_MODE bit control)
        1. 8.3.4.1 SYS Pulldown Control
      5. 8.3.5  SYS Regulation
      6. 8.3.6  ILIM Control
      7. 8.3.7  Protection Mechanisms
        1. 8.3.7.1 Input Overvoltage Protection
        2. 8.3.7.2 Battery Undervoltage Lockout
        3. 8.3.7.3 System Overvoltage Protection
        4. 8.3.7.4 System Short Protection
        5. 8.3.7.5 Battery Overcurrent Protection
        6. 8.3.7.6 Safety Timer and Watchdog Timer
        7. 8.3.7.7 Thermal Protection and Thermal Regulation
      8. 8.3.8  Pushbutton Wake and Reset Input
        1. 8.3.8.1 Pushbutton Wake or Short Button Press Functions
        2. 8.3.8.2 Pushbutton Reset or Long Button Press Functions
      9. 8.3.9  15-Second Timeout for HW Reset
      10. 8.3.10 Hardware Reset
      11. 8.3.11 Software Reset
      12. 8.3.12 Interrupt Indicator (/INT) Pin
      13. 8.3.13 External NTC Monitoring (TS)
        1. 8.3.13.1 TS Biasing and Function
      14. 8.3.14 I2C Interface
        1. 8.3.14.1 F/S Mode Protocol
    4. 8.4 Device Functional Modes
    5. 8.5 Register Maps
      1. 8.5.1 I2C Registers
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input (IN/SYS) Capacitors
        2. 9.2.2.2 TS
        3. 9.2.2.3 Recommended Passive Components
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 サード・パーティ製品に関する免責事項
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
  • YBG|8
サーマルパッド・メカニカル・データ
発注情報

8.5.1 I2C Registers

#GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_TABLE_1_TABLE lists the memory-mapped registers for the I2C registers. All register offset addresses not listed in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_TABLE_1_TABLE should be considered as reserved locations and the register contents should not be modified.

Table 8-7 I2C Registers
OffsetAcronymRegister NameSection
0x0STAT0Charger StatusGo
0x1STAT1Charger Status and FaultsGo
0x2FLAG0Charger Flag RegistersGo
0x3VBAT_CTRLBattery Voltage ControlGo
0x4ICHG_CTRLFast Charge Current ControlGo
0x5CHARGECTRL0Charger Control 0Go
0x6CHARGECTRL1Charger Control 1Go
0x7IC_CTRLIC ControlGo
0x8TMR_ILIMTimer and Input Current Limit ControlGo
0x9SHIP_RSTShipmode, Reset and Pushbutton ControlGo
0xASYS_REGSYS Regulation Voltage ControlGo
0xBTS_CONTROLTS ControlGo
0xCMASK_IDMASK and Device IDGo

Complex bit access types are encoded to fit into small table cells. #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_LEGEND_TABLE shows the codes that are used for access types in this section.

Table 8-8 I2C Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
RCR
C		Read
to Clear
Write Type
WWWrite
Reset or Default Value
-nValue after reset or the default value

8.5.1.1 STAT0 Register (Offset = 0x0) [Reset = X]

STAT0 is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_STAT0_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_STAT0_TABLE_TABLE.

Return to the Summary Table.

Figure 8-10 STAT0 Register
76543210
TS_OPEN_STATCHG_STAT_1:0ILIM_ACTIVE_STATVDPPM_ACTIVE_STATVINDPM_ACTIVE_STATTHERMREG_ACTIVE_STATVIN_PGOOD_STAT
R-XR-XR-XR-XR-XR-XR-X
Table 8-9 STAT0 Register Field Descriptions
BitFieldTypeResetDescription
7TS_OPEN_STATRX TS Open Status
1b0 = TSMR pin is not Open
1b1 = TSMR pin is Open
6-5CHG_STAT_1:0RX Charging Status Indicator
2b00 = Not Charging while charging is enabled.
2b01 = Constant Current Charging (Trickle Charge/ Pre Charge or in Fast Charge Mode)
2b10 = Constant Voltage Charging
2b11 = Charge Done or charging is disabled by the host.
4ILIM_ACTIVE_STATRX Input Curent Limit Active
1b0 = Not Active
1b1 = Active
3VDPPM_ACTIVE_STATRX VDPPM Mode Active
1b0 = Not Active
1b1 = Active
2VINDPM_ACTIVE_STATRX VINDPM Mode Active
1b0 = Not Active
1b1 = Active
1THERMREG_ACTIVE_STATRX Thermal Regulation Active
1b0 = Not Active
1b1 = Active
0VIN_PGOOD_STATRX VIN Power Good
1b0 = VIN Power Not Good
1b1 = VIN Power Good

8.5.1.2 STAT1 Register (Offset = 0x1) [Reset = X]

STAT1 is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_STAT1_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_STAT1_TABLE_TABLE.

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Figure 8-11 STAT1 Register
76543210
VIN_OVP_STATBUVLO_STATRESERVEDTS_STAT_1:0SAFETY_TMR_FAULT_FLAGWAKE1_FLAGWAKE2_FLAG
R-1b0R-XR-XR-2b00RC-1b0RC-1b0RC-1b0
Table 8-10 STAT1 Register Field Descriptions
BitFieldTypeResetDescription
7VIN_OVP_STATR1b0 VIN_OVP Fault
1b0 = Not Active
1b1 = Active
6BUVLO_STATRX Battery UVLO Status
1b0 = Not Active
1b1 = Active
5RESERVEDRX Reserved
4-3TS_STAT_1:0R2b00 TS Status
2b00 = Normal
2b01 = VTS < VHOT or VTS > VCOLD(charging suspended)
2b10 = VCOOL < VTS < VCOLD (Charging current reduced by value set by TS_Registers)
2b11 = VWARM > VTS > VHOT (Charging voltage reduced by value set by TS_Registers)
2SAFETY_TMR_FAULT_FLAGRC1b0 Safety Timer Expired Fault Cleared only after CE is toggled.
1b0 = Not Active
1b1 = Active
1WAKE1_FLAGRC1b0 Wake 1 Timer Flag
1b0 = Does not meet Wake 1 Condition
1b1 = Met Wake 1 Condition
0WAKE2_FLAGRC1b0 Wake 2 Timer Flag
1b0 = Does not meet Wake 2 Condition
1b1 = Met Wake2 Condition

8.5.1.3 FLAG0 Register (Offset = 0x2) [Reset = X]

FLAG0 is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_FLAG0_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_FLAG0_TABLE_TABLE.

Return to the Summary Table.

Figure 8-12 FLAG0 Register
76543210
TS_FAULTILIM_ACTIVE_FLAGVDPPM_ACTIVE_FLAGVINDPM_ACTIVE_FLAGTHERMREG_ACTIVE_FLAGVIN_OVP_FAULT_FLAGBUVLO_FAULT_FLAGBAT_OCP_FAULT
RC-XRC-XRC-XRC-XRC-XRC-XRC-XRC-X
Table 8-11 FLAG0 Register Field Descriptions
BitFieldTypeResetDescription
7TS_FAULTRCX TS_Fault
1b0 = No TS Fault detected
1b1 = TS Fault detected
6ILIM_ACTIVE_FLAGRCX ILIM Active
1b0 = NO ILIM Fault detected
1b1 = ILIM Fault detected
5VDPPM_ACTIVE_FLAGRCX VDPPM FLAG
1b0 = VDPPM fault not detected
1b1 = VDPPM fault detected
4VINDPM_ACTIVE_FLAGRCX VINDPM FLAG
1b0 = VINDPM fault not detected
1b1 = VINDPM fault detected
3THERMREG_ACTIVE_FLAGRCX Thermal Regulation FLAG
1b0 = No thermal regulation detected
1b1 = Thermal regulation has occured
2VIN_OVP_FAULT_FLAGRCX VIN_OVP FLAG
1b0 = VIN_OVP fault not detected
1b1 = VIN_OVP fault detected
1BUVLO_FAULT_FLAGRCX Battery undervoltage FLAG
1b0 = Battery undervoltage fault not detected
1b1 = Battery undervoltage fault detected
0BAT_OCP_FAULTRCX Battery overcurrent protection
1b0 = Battery overcurrent condition not detected
1b1 = Battery overcurrent condition detected

8.5.1.4 VBAT_CTRL Register (Offset = 0x3) [Reset = 0x46]

VBAT_CTRL is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_VBAT_CTRL_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_VBAT_CTRL_TABLE_TABLE.

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Figure 8-13 VBAT_CTRL Register
76543210
RESERVEDVBATREG_6:0
R/W-1b0R/W-7b1000110
Table 8-12 VBAT_CTRL Register Field Descriptions
BitFieldTypeResetDescription
7RESERVEDR/W1b0 Reserved
6-0VBATREG_6:0R/W7b1000110 Battery Regulation Voltage VBATREG= 3.5V + VBATREG_CODE * 10mV.
Maximum programmable voltage = 4.65V

8.5.1.5 ICHG_CTRL Register (Offset = 0x4) [Reset = 0x05]

ICHG_CTRL is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_ICHG_CTRL_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_ICHG_CTRL_TABLE_TABLE.

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Figure 8-14 ICHG_CTRL Register
76543210
CHG_DISICHG_6:0
R/W-1b0R/W-7b0000101
Table 8-13 ICHG_CTRL Register Field Descriptions
BitFieldTypeResetDescription
7CHG_DISR/W1b0 Charge Disable
1b0 = Battery Charging Enabled
1b1 = Battery Charging Disabled
6-0ICHG_6:0R/W7b0000101 For ICHG <= 35mA = ICHGCODE +5mA For ICHG > 35mA = 40+((ICHGCODE-31)*10)mA.
Maximum programmable current = 1000mA

8.5.1.6 CHARGECTRL0 Register (Offset = 0x5) [Reset = 0x2C]

CHARGECTRL0 is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_CHARGECTRL0_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_CHARGECTRL0_TABLE_TABLE.

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Figure 8-15 CHARGECTRL0 Register
76543210
RESERVEDIPRECHGITERM_1:0VINDPM_1:0THERM_REG_1:0
R/W-1b0R/W-1b0R/W-2b10R/W-2b11R/W-2b00
Table 8-14 CHARGECTRL0 Register Field Descriptions
BitFieldTypeResetDescription
7RESERVEDR/W1b0 Reserved
6IPRECHGR/W1b0 Precharge current = x times of term
1b0 = Precharge is 2x Term
1b1 = Precharge is Term
5-4ITERM_1:0R/W2b10 Termination current = % of Icharge
2b00 = Disable
2b01 = 5% of ICHG
2b10 = 10% of ICHG
2b11 = 20% of ICHG
3-2VINDPM_1:0R/W2b11 VINDPM Level Selection
2b00 = 4.2 V
2b01 = 4.5 V
2b10 = 4.7 V
2b11 = Disabled
1-0THERM_REG_1:0R/W2b00 Thermal Regulation Threshold
2b00 = 100C
2b11 = Disabled

8.5.1.7 CHARGECTRL1 Register (Offset = 0x6) [Reset = 0x56]

CHARGECTRL1 is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_CHARGECTRL1_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_CHARGECTRL1_TABLE_TABLE.

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Figure 8-16 CHARGECTRL1 Register
76543210
IBAT_OCP_1:0BUVLO_2:0CHG_STATUS_INT_MASKILIM_INT_MASKVDPM_INT_MASK
R/W-2b01R/W-3b010R/W-1b1R/W-1b1R/W-1b0
Table 8-15 CHARGECTRL1 Register Field Descriptions
BitFieldTypeResetDescription
7-6IBAT_OCP_1:0R/W2b01 Battery Discharge Current Limit
2b00 = 500mA
2b01 = 1000mA
2b10 = 1500mA
2b11 = Disabled
5-3BUVLO_2:0R/W3b010 Battery Undervoltage LockOut Falling Threshold.
3b000 = 3.0V
3b001 = 3.0V
3b010 = 3.0V
3b011 = 2.8V
3b100 = 2.6V
3b101 = 2.4V
3b110 = 2.2V
3b111 = 2.0V
2CHG_STATUS_INT_MASKR/W1b1 Mask Charging Status Interrupt
1b0 = Enable Charging Status Interrupt anytime there is a charging status change.
1b1 = Mask Charging Status Interrupt
1ILIM_INT_MASKR/W1b1 Mask ILIM Fault Interrupt
1b0 = Enable ILIM Interrupt
1b1 = Mask ILIM Interrupt
0VDPM_INT_MASKR/W1b0 Mask VINDPM and VDPPM Interrupt
1b0 = Enable VINDPM and VDPPM Interrupt
1b1 = Mask VINDPM and VDPPM Interrupt

8.5.1.8 IC_CTRL Register (Offset = 0x7) [Reset = 0x84]

IC_CTRL is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_IC_CTRL_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_IC_CTRL_TABLE_TABLE.

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Figure 8-17 IC_CTRL Register
76543210
TS_ENVLOWV_SELVRCH_02XTMR_ENSAFETY_TIMER_1:0WATCHDOG_SEL_1:0
R/W-1b1R/W-1b0R/W-1b0R/W-1b0R/W-2b01R/W-2b00
Table 8-16 IC_CTRL Register Field Descriptions
BitFieldTypeResetDescription
7TS_ENR/W1b1 TS Auto Function
1b0 = TS auto function disabled (Only charge control is disabled. TS monitoring is enabled)
1b1 = TS auto function enabled
6VLOWV_SELR/W1b0 Precharge Voltage Threshold (VLOWV)
1b0 = 3V
1b1 = 2.8V
5VRCH_0R/W1b0 Recharge Voltage Threshold
1b0 = 100mV
1b1 = 200 mV
42XTMR_ENR/W1b0 Timer Slow
1b0 = The timer is not slowed at any time
1b1 = The timer is slowed by 2x when in any control other than CC or CV
3-2SAFETY_TIMER_1:0R/W2b01 Fast Charge Timer
2b00 = 3 hour fast charge
2b01 = 6 hour fast charge
2b10 = 12 hour fast charge
2b11 = Disable safety timer
1-0WATCHDOG_SEL_1:0R/W2b00 Watchdog Selection
2b00 = 160s default register values
2b01 = 160s HW_RESET
2b10 = 40s HW_RESET
2b11 = Disable watchdog function

8.5.1.9 TMR_ILIM Register (Offset = 0x8) [Reset = 0x4D]

TMR_ILIM is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_TMR_ILIM_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_TMR_ILIM_TABLE_TABLE.

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Figure 8-18 TMR_ILIM Register
76543210
MR_LPRESS_1:0MR_RESET_VINAUTOWAKE_1:0ILIM_2:0
R/W-2b01R/W-1b0R/W-2b01R/W-3b101
Table 8-17 TMR_ILIM Register Field Descriptions
BitFieldTypeResetDescription
7-6MR_LPRESS_1:0R/W2b01 Push button Long Press duration timer
2b00 = 5s
2b01 = 10s
2b10 = 15s
2b11 = 20s
5MR_RESET_VINR/W1b0 Hardware reset condition
1b0 = Reset sent when long press duration is met
1b1 = Reset sent when long press duration is met and VIN_Powergood
4-3AUTOWAKE_1:0R/W2b01 Auto Wake Up Timer Restart
2b00 = 0.5s
2b01 = 1s
2b10 = 2s
2b11 = 4s
2-0ILIM_2:0R/W3b101 Input Current Limit Setting
3b000 = 50mA
3b001 = 100mA(max.)
3b010 = 200mA
3b011 = 300mA
3b100 = 400mA
3b101 = 500mA(max.)
3b110 = 700mA
3b111 = 1100mA

8.5.1.10 SHIP_RST Register (Offset = 0x9) [Reset = 0x11]

SHIP_RST is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_SHIP_RST_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_SHIP_RST_TABLE_TABLE.

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Figure 8-19 SHIP_RST Register
76543210
REG_RSTEN_RST_SHIP_1:0PB_LPRESS_ACTION_1:0WAKE1_TMRWAKE2_TMREN_PUSH
R/W-1b0R/W-2b00R/W-2b10R/W-1b0R/W-1b0R/W-1b1
Table 8-18 SHIP_RST Register Field Descriptions
BitFieldTypeResetDescription
7REG_RSTR/W1b0 Software Reset
1b0 = Do nothing
1b1 = Software Reset
6-5EN_RST_SHIP_1:0R/W2b00 Shipmode Enable and Hardware Reset
2b00 = Do nothing
2b01 = Enable shutdown mode with wake on adapter insert only
2b10 = Enable shipmode with wake on button press or adapter insert
2b11 = Hardware Reset
4-3PB_LPRESS_ACTION_1:0R/W2b10 Pushbutton long press action
2b00 = Do nothing
2b01 = Hardware Reset
2b10 = Enable shipmode
2b11 = Enable shutdown mode
2WAKE1_TMRR/W1b0 Wake 1 Timer Set
1b0 = 300ms
1b1 = 1s
1WAKE2_TMRR/W1b0 Wake 2 Timer Set
1b0 = 2s
1b1 = 3s
0EN_PUSHR/W1b1 Enable Push Button and Reset Function on Battery Only
1b0 = Disable
1b1 = Enable

8.5.1.11 SYS_REG Register (Offset = 0xA) [Reset = 0x40]

SYS_REG is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_SYS_REG_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_SYS_REG_TABLE_TABLE.

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Figure 8-20 SYS_REG Register
76543210
SYS_REG_CTRL_2:0RESERVEDSYS_MODE_1:0WATCHDOG_15S_ENABLEVDPPM_DIS
R/W-3b010R/W-1b0R/W-2b00R/W-1b0R/W-1b0
Table 8-19 SYS_REG Register Field Descriptions
BitFieldTypeResetDescription
7-5SYS_REG_CTRL_2:0R/W3b010 SYS Regulation Voltgage
3b000 = Battery Tracking Mode
3b001 = 4.4V
3b010 = 4.5V
3b011 = 4.6V
3b100 = 4.7V
3b101 = 4.8V
3b110 = 4.9V
3b111 = Pass-Through (VSYS is VIN)
4RESERVEDR/W1b0 Reserved
3-2SYS_MODE_1:0R/W2b00 Sets how SYS is powered in any state, except SHIPMODE
2b00 = SYS powered from VIN if present or VBAT
2b01 = SYS powered from VBAT only, even if VIN present
2b10 = SYS disconnected and left floating
2b11 = SYS disconnected with pulldown
1WATCHDOG_15S_ENABLER/W1b0 I2C Watchdog
1b0 = Mode Disabled
1b1 = Do a HW reset after 15s if no I2C transaction after VIN plugged
0VDPPM_DISR/W1b0 Disable VDPPM
1b0 = Enable VDPPM
1b1 = Disable VDPPM

8.5.1.12 TS_CONTROL Register (Offset = 0xB) [Reset = 0x00]

TS_CONTROL is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_TS_CONTROL_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_TS_CONTROL_TABLE_TABLE.

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Figure 8-21 TS_CONTROL Register
76543210
TS_HOTTS_COLDTS_WARMTS_COOLTS_ICHGTS_VRCG
R/W-2b00R/W-2b00R/W-1b0R/W-1b0R/W-1b0R/W-1b0
Table 8-20 TS_CONTROL Register Field Descriptions
BitFieldTypeResetDescription
7-6TS_HOTR/W2b00 TS Hot threshold register
2b00 = Default 60C
2b01 = 65C
2b10 = 50C
2b11 = 45C
5-4TS_COLDR/W2b00 TS Cold threshold register
2b00 = Default 0C
2b01 = 3C
2b10 = 5C
2b11 = -3C
3TS_WARMR/W1b0 TS Warm threshold
1b0 = Default 45C
1b1 = Disabled
2TS_COOLR/W1b0 TS Cool threshold register
1b0 = Default 10C
1b1 = Disabled
1TS_ICHGR/W1b0 Fast charge current when decreased by TS function
1b0 = 0.5*ICHG
1b1 = 0.2*ICHG
0TS_VRCGR/W1b0 Reduced target battery voltage during Warm
1b0 = VBATREG -100mV
1b1 = VBATREG -200mV

8.5.1.13 MASK_ID Register (Offset = 0xC) [Reset = 0xC0]

MASK_ID is shown in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_MASK_ID_FIGURE_TABLE and described in #GUID-20200720-SS0T-BKNZ-LD14-DJ0Z5QGHGHWS/I2C_I2C_I2C_MASK_ID_TABLE_TABLE.

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Figure 8-22 MASK_ID Register
76543210
TS_INT_MASKTREG_INT_MASKBAT_INT_MASKPG_INT_MASKDevice_ID
R/W-1b1R/W-1b1R/W-1b0R/W-1b0R-4b0000
Table 8-21 MASK_ID Register Field Descriptions
BitFieldTypeResetDescription
7TS_INT_MASKR/W1b1 Mask TS
1b0 = Enable TS Interrupt
1b1 = Mask TS Interrupt
6TREG_INT_MASKR/W1b1 Mask TREG
1b0 = Enable TREG Interrupt
1b1 = Mask TREG Interrupt
5BAT_INT_MASKR/W1b0 Mask BATOCP and BUVLO
1b0 = Enable BOCP and BUVLO Interrupt
1b1 = Mask BOCP and BUVLO Interrupt
4PG_INT_MASKR/W1b0 Mask PG and VINOVP
1b0 = Enable PG and VINOVP Interrupt
1b1 = Mask PG and VINOVP Interrupt
3-0Device_IDR4b0000 Device ID
4b0000 = BQ25180