JAJSDQ0B June 2017 – March 2022 BQ25600 , BQ25600D
PRODUCTION DATA
| Bit | Field | POR | Type | Reset | Description | Comment |
|---|---|---|---|---|---|---|
| 7 | IINDET_EN | 0 | R/W | by REG_RST by Watchdog | 0 – Not in D+/D– detection (or PSEL detection); 1 – Force D+/D– detection | Default: Not in DPDM detection (0) Note: For PSEL part, reads PSEL pin value |
| 6 | TMR2X_EN | 1 | R/W | by REG_RST by Watchdog | 0 – Disable 1 – Safety timer slowed by 2X during input DPM (both V and I) or JEITA cool, or thermal regulation | |
| 5 | BATFET_DIS | 0 | R/W | by REG_RST | 0 – Allow Q4 turn on, 1 – Turn off Q4 with tBATFET_DLY delay time (REG07[3]) | Default: Allow Q4 turn on(0) |
| 4 | JEITA_VSET (45C-60C) | 0 | R/W | by REG_RST by Watchdog | 0 – Set Charge Voltage to 4.1V ( max), 1 – Set Charge Voltage to VREG | |
| 3 | BATFET_DLY | 1 | R/W | by REG_RST | 0 – Turn off BATFET immediately when BATFET_DIS bit is set 1 – Turn off BATFET after tBATFET_DLY (typ. 10 s) when BATFET_DIS bit is set | Default: 1 Turn off BATFET after tBATFET_DLY (typ. 10 s) when BATFET_DIS bit is set |
| 2 | BATFET_RST_EN | 1 | R/W | by REG_RST by Watchdog | 0 – Disable BATFET reset function 1 – Enable BATFET reset function | Default: 1 Enable BATFET reset function |
| 1 | VDPM_BAT_TRACK[1] | 0 | R/W | by REG_RST | 00 – Disable function (VINDPM set by register) 01 – VBAT + 200 mV 10 – VBAT + 250 mV 11 – VBAT + 300 mV | Sets VINDPM to track BAT voltage. Actual VINDPM is higher of register value and VBAT + VDPM_BAT_TRACK |
| 0 | VDPM_BAT_TRACK[0] | 0 | R/W | by REG_RST |
| LEGEND: R/W = Read/Write; R = Read only |