JAJSDQ0B June   2017  – March 2022 BQ25600 , BQ25600D

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-On-Reset (POR)
      2. 8.3.2 Device Power Up from Battery without Input Source
      3. 8.3.3 Power Up from Input Source
        1. 8.3.3.1 Power Up REGN Regulation
        2. 8.3.3.2 Poor Source Qualification
        3. 8.3.3.3 Input Source Type Detection
          1. 8.3.3.3.1 D+/D– Detection Sets Input Current Limit in BQ25600D
          2. 8.3.3.3.2 PSEL Pins Sets Input Current Limit in BQ25600
        4. 8.3.3.4 Input Voltage Limit Threshold Setting (VINDPM Threshold)
        5. 8.3.3.5 Converter Power Up
      4. 8.3.4 Boost Mode Operation From Battery
      5. 8.3.5 Host Mode and Standalone Power Management
        1. 8.3.5.1 Host Mode and Default Mode in BQ25600 and BQ25600D
      6. 8.3.6 Power Path Management
      7. 8.3.7 Battery Charging Management
        1. 8.3.7.1 Autonomous Charging Cycle
        2. 8.3.7.2 Battery Charging Profile
        3. 8.3.7.3 Charging Termination
        4. 8.3.7.4 Thermistor Qualification
        5. 8.3.7.5 JEITA Guideline Compliance During Charging Mode
        6. 8.3.7.6 Boost Mode Thermistor Monitor During Battery Discharge Mode
        7. 8.3.7.7 Charging Safety Timer
      8. 8.3.8 Protections
        1. 8.3.8.1 Voltage and Current Monitoring in Converter Operation
          1. 8.3.8.1.1 Voltage and Current Monitoring in Buck Mode
            1. 8.3.8.1.1.1 Input Overvoltage (ACOV)
            2. 8.3.8.1.1.2 System Overvoltage Protection (SYSOVP)
        2. 8.3.8.2 Voltage and Current Monitoring in Boost Mode
          1. 8.3.8.2.1 VBUS Soft Start
          2. 8.3.8.2.2 VBUS Output Protection
          3. 8.3.8.2.3 Boost Mode Overvoltage Protection
        3. 8.3.8.3 Thermal Regulation and Thermal Shutdown
          1. 8.3.8.3.1 Thermal Protection in Buck Mode
          2. 8.3.8.3.2 Thermal Protection in Boost Mode
        4. 8.3.8.4 Battery Protection
          1. 8.3.8.4.1 Battery Overvoltage Protection (BATOVP)
          2. 8.3.8.4.2 Battery Overdischarge Protection
          3. 8.3.8.4.3 System Overcurrent Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Narrow VDC Architecture
      2. 8.4.2 Dynamic Power Management
      3. 8.4.3 Supplement Mode
      4. 8.4.4 Shipping Mode and QON Pin
        1. 8.4.4.1 BATFET Disable Mode (Shipping Mode)
        2. 8.4.4.2 BATFET Enable (Exit Shipping Mode)
        3. 8.4.4.3 BATFET Full System Reset
        4. 8.4.4.4 QON Pin Operations
      5. 8.4.5 Status Outputs ( PG, STAT, INT )
        1. 8.4.5.1 Power Good Indicator ( PG Pin and PG_STAT Bit)
        2. 8.4.5.2 Charging Status Indicator (STAT)
        3. 8.4.5.3 Interrupt to Host ( INT)
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
        1. 8.5.1.1 Data Validity
        2. 8.5.1.2 START and STOP Conditions
        3. 8.5.1.3 Byte Format
        4. 8.5.1.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.5.1.5 Slave Address and Data Direction Bit
        6. 8.5.1.6 Single Read and Write
        7. 8.5.1.7 Multi-Read and Multi-Write
    6. 8.6 Register Maps
      1. 8.6.1  REG00
      2. 8.6.2  REG01
      3. 8.6.3  REG02
      4. 8.6.4  REG03
      5. 8.6.5  REG04
      6. 8.6.6  REG05
      7. 8.6.7  REG06
      8. 8.6.8  REG07
      9. 8.6.9  REG08
      10. 8.6.10 REG09
      11. 8.6.11 REG0A
      12. 8.6.12 REG0B
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input Capacitor
        3. 9.2.2.3 Output Capacitor
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

VVAC_UVLOZ < VVAC < VVAC_OV and VVAC > VBAT + VSLEEP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
QUIESCENT CURRENTS
IBATBattery discharge current (BAT, SW, SYS) in buck modeVBAT = 4.5 V, VBUS < VAC-UVLOZ, leakage between BAT and VBUS, TJ< 85°C5µA
IBATBattery discharge current (BAT) in buck modeVBAT = 4.5 V, HIZ Mode and OVPFET_DIS = 1 or No VBUS, I2C disabled, BATFET Disabled. TJ < 85°C1733µA
IBATBattery discharge current (BAT, SW, SYS)VBAT = 4.5 V, HIZ Mode and OVPFET_DIS = 1 or No VBUS, I2C Disabled, BATFET Enabled. TJ < 85°C5885µA
IVAC_HIZInput supply current (VAC) in buck modeVVAC = 5 V, HIZ Mode and OVPFET_DIS = 1, No battery2437µA
VVAC = 12 V, HIZ Mode and OVPFET_DIS = 1, No battery4161µA
IVACVBUS_HIZInput supply current (VAC and VBUS short) in buck modeVVAC = 5 V, HIZ Mode and OVPFET_DIS = 1, No battery3750µA
VVAC = 12 V, HIZ Mode and OVPFET_DIS = 1, No battery6890µA
IVBUSInput supply current (VBUS) in buck modeVVBUS = 12 V, VVBUS > VVBAT, converter not switching1.53mA
VVBUS > VUVLO, VVBUS > VVBAT, converter switching, VBAT = 3.8V, ISYS = 0A3mA
IBOOSTBattery discharge current in boost modeVBAT = 4.2 V, boost mode, IVBUS = 0 A, converter switching3mA
VBUS, VAC AND BAT PIN POWER-UP
VBUS_OPVBUS operating rangeVVBUS rising3.913.5V
VVAC_UVLOZVAC for active I2C, no battery

Sense VAC pin voltage

VVAC rising3.33.7V
VVAC_UVLOZ_HYSI2C active hysteresisVAC falling from above VVAC_UVLOZ300mV
VVAC_PRESENTREGN turn-on thresholdVVAC rising3.653.9V
VVAC_PRESENT_HYSVVAC falling500mV
VSLEEPSleep mode falling threshold(VVAC–VVBAT ), VBUSMIN_FALL ≤ VBAT ≤ VREG, VAC falling1560131mV
VSLEEPZSleep mode rising threshold(VVAC–VVBAT ), VBUSMIN_FALL ≤ VBAT ≤ VREG, VAC rising115220340mV
VVAC_OV_RISEVAC 6.5-V Overvoltage rising thresholdVAC rising; OVP (REG06[7:6]) = '01'6.16.426.75V
VVAC_OV_RISEVAC 10.5-V Overvoltage rising thresholdVAC rising, OVP (REG06[7:6]) = '10'10.351111.5V
VVAC_OV_RISEVAC 14-V Overvoltage rising thresholdVAC rising, OVP (REG06[7:6]) = '11'13.514.215V
VVAC_OV_HYSVAC 6.5-V Overvoltage hysteresisVAC falling, OVP (REG06[7:6]) = '01'130mV
VVAC_OV_HYSVAC 10.5-V Overvoltage hysteresisVAC falling, OVP (REG06[7:6]) = '10'250mV
VVAC_OV_HYSVAC 14-V Overvoltage hysteresisVAC falling, OVP (REG06[7:6]) = '11'300mV
VBAT_UVLOZBAT for active I2C, no adapterVBAT rising2.5V
VBAT_DPL_FALLBattery Depletion ThresholdVBAT falling2.182.62V
VBAT_DPL_RISEBattery Depletion ThresholdVBAT rising2.342.86V
VBAT_DPL_HYSTBattery Depletion rising hysteresisVBAT rising180mV
VBUSMIN_FALLBad adapter detection falling thresholdVBUS falling3.683.83.9V
VBUSMIN_HYSTBad adapter detection hysteresis180mV
IBADSRCBad adapter detection current sourceSink current from VBUS to GND30mA
POWER-PATH
VSYS_MINSystem regulation voltageVVBAT < SYS_MIN[2:0] = 101, BATFET Disabled (REG07[5] = 1)3.53.68V
VSYSSystem Regulation VoltageISYS = 0 A, VVBAT > VSYSMIN, VVBAT = 4.400 V, BATFET disabled (REG07[5] = 1)VBAT + 50 mVV
VSYS_MAXMaximum DC system voltage outputISYS = 0 A, , Q4 off, VVBAT≤ 4.400 V, VVBAT > VSYSMIN = 3.5V4.44.454.48V
RON(RBFET)Top reverse blocking MOSFET on-resistance between VBUS and PMID - Q1-40°C≤ TA ≤ 125°C35mΩ
RON(HSFET)Top switching MOSFET on-resistance between PMID and SW - Q2VREGN = 5 V , -40°C≤ TA ≤ 125°C55mΩ
RON(LSFET)Bottom switching MOSFET on-resistance between SW and GND - Q3VREGN = 5 V , -40°C≤ TA ≤ 125°C60mΩ
VFWDBATFET forward voltage in supplement mode30mV
RON(BAT-SYS)SYS-BAT MOSFET on-resistanceQFN package, Measured from BAT to SYS, VBAT = 4.2V, TJ = –40 - 125°C19.5mΩ
BATTERY CHARGER
VBATREG_RANGECharge voltage program range3.8564.624V
VBATREG_STEPCharge voltage step32mV
VBATREGCharge voltage settingVREG (REG04[7:3]) = 4.208 V (01011), V, –40 ≤ TJ ≤ 85°C4.1874.2084.229V
VREG (REG04[7:3]) = 4.352 V (01111), V, –40 ≤ TJ ≤ 85°C4.3304.3524.374V
VBATREG_ACCCharge voltage setting accuracyVBAT = 4.208 V or VBAT = 4.352 V, –40 ≤ TJ ≤ 85°C–0.5%0.5%
ICHG_REG_RANGECharge current regulation range03000mA
ICHG_REG_STEPCharge current regulation step60mA
ICHG_REGCharge current regulation settingICHG = 240 mA, VVBAT = 3.1V or VVBAT = 3.8 V0.2140.240.26A
ICHG_REG_ACCCharge current regulation accuracyICHG = 240 mA, VVBAT = 3.1 V or VVBAT = 3.8 V–11%9%
ICHG_REGCharge current regulation settingICHG = 720 mA, VVBAT = 3.1 V or VVBAT = 3.8 V0.680.7200.76A
ICHG_REGCharge current regulation accuracyICHG_REG = 720 mA, VBAT = 3.1 V or VBAT = 3.8 V-6%6%
ICHG_REGCharge current regulation settingICHG = 1.38 A, VVBAT = 3.1 V or VVBAT = 3.8 V1.301.3801.45A
ICHG_REG_ACCCharge current regulation accuracyICHG = 720 mA or ICHG = 1.38 A, VVBAT = 3.1 V or VVBAT = 3.8 V–6%6%
VBATLOWV_FALLBattery LOWV falling thresholdICHG = 240 mA2.72.82.9V
VBATLOWV_RISEBattery LOWV rising thresholdPre-charge to fast charge33.123.24V
IPRECHGPrecharge current regulationIPRECHG[3:0] = '0010' = 180 mA150170190mA
IPRECHG_ACCPrecharge current regulation accuracyIPRECHG[3:0] = '0010' = 180 mA–155%
ITERMTermination current regulationICHG > 780 mA, ITERM[3:0] = '0010' = 180 mA, VVBAT = 4.208 V145180215mA
ITERM_ACCTermination current regulation accuracyICHG > 780 mA, , ITERM[3:0] = '0010' = 180 mA, VVBAT = 4.208 V-20%20%
ITERMTermination current regulationICHG ≤ 780 mA, , ITERM[3:0] = '0000' = 60 mA, VVBAT = 4.208 V446075mA
ITERM_ACCTermination current regulation accuracyICHG ≤ 780 mA, ,ITERM[3:0] = '0000' = 60 mA, VVBAT = 4.208 V-27%25%
VSHORTBattery short voltageVVBAT falling1.8522.15V
VSHORTZBattery short voltageVVBAT rising2.152.252.35V
ISHORTBattery short currentVVBAT < VSHORTZ5090117mA
VRECHGRecharge Threshold below VBAT_REGVBAT falling, REG04[0] = 090120150mV
VRECHGRecharge Threshold below VBAT_REGVBAT falling, REG04[0] = 1200230265mV
ISYSLOADSystem discharge load currentVSYS = 4.2 V30mA
INPUT VOLTAGE AND CURRENT REGULATION
VINDPMInput voltage regulation limitVINDPM (REG06[3:0] = 0000) = 3.9 V3.783.954.1V
VINDPM_ACCInput voltage regulation accuracyVINDPM (REG06[3:0] = 0000) = 3.9 V–4.5%4%
VINDPMInput voltage regulation limitVINDPM (REG06[3:0] = 0110) = 4.4 V4.2684.44.532V
VINDPM_ACCInput voltage regulation accuracyVINDPM (REG06[3:0] = 0110) = 4.4 V–3%3%
VDPM_VBATInput voltage regulation limit tracking VBATVINDPM = 3.9V, VDPM_VBAT_TRACK = 300mV, VBAT = 4.0V4.174.34.46V
VDPM_VBAT_ACCInput voltage regulation accuracy tracking VBATVINDPM = 3.9V, VDPM_VBAT_TRACK = 300mV, VBAT = 4.0V–3%4%
IINDPMUSB input current regulation limitVVBUS = 5 V, current pulled from SW, IINDPM (REG[4:0] = 00100) = 500 mA, –40 ≤ TJ ≤ 85°C450500mA
VVBUS = 5 V, current pulled from SW, IINDPM (REG[4:0] = 01000) = 900 mA, –40 ≤ TJ ≤ 85°C750900mA
VVBUS = 5 V, current pulled from SW, IINDPM (REG[4:0] = 01110) = 1.5 A, –40 ≤ TJ ≤ 85°C1.281.5A
IIN_STARTInput current limit during system start-up sequence200mA
BAT PIN OVERVOLTAGE PROTECTION
VBATOVP_RISEBattery overvoltage thresholdVBAT rising, as percentage of VBAT_REG103104105%
VBATOVP_Fall_HYSBattery overvoltage falling hysteresisVBAT falling, as percentage of VBAT_REG2%
THERMAL REGULATION AND THERMAL SHUTDOWN
TJUNCTION_REGJunction Temperature Regulation ThresholdTemperature Increasing, TREG (REG05[1] = 1) = 110℃110°C
TJUNCTION_REGJunction Temperature Regulation ThresholdTemperature Increasing, TREG (REG05[1] = 0) = 90℃90°C
TSHUTThermal Shutdown Rising TemperatureTemperature Increasing160°C
TSHUT_HYSTThermal Shutdown Hysteresis30°C
JEITA THERMISTOR COMPARATOR (BUCK MODE)
VT1T1 (0°C) threshold, Charge suspended T1 below this temperature.Charger suspends charge. As Percentage to VREGN72.4%73.3%74.2%
VT1FallingAs Percentage to VREGN69%71.5%74%
VT2T2 (10°C) threshold, Charge back to ICHG/2 and 4.2 V below this temperatureAs percentage of VREGN67.2%68%69%
VT2FallingAs Percentage to VREGN66%66.8%67.7%
VT3T3 (45°C) threshold, charge back to ICHG and 4.05V above this temperature.Charger suspends charge. As Percentage to VREGN43.8%44.7%45.8%
VT3FallingAs Percentage to VREGN45.1%45.7%46.2%
VT5T5 (60°C) threshold, charge suspended above this temperature.As Percentage to VREGN33.7%34.2%35.1%
VT5FallingAs Percentage to VREGN34.5%35.3%36.2%
COLD OR HOT THERMISTER COMPARATOR (BOOST MODE)
VBCOLDCold Temperature Threshold, TS pin Voltage Rising ThresholdAs Percentage to VREGN  (Approx. -20°C w/ 103AT), TJ = –20°C - 125°C79.5%80%80.5%
VBCOLDFallingTJ = –20°C - 125°C78.5%79%79.5%
VBHOTHot Temperature Threshold, TS pin Voltage falling ThresholdAs Percentage to VREGN (Approx. 60°C w/ 103AT), TJ = –20°C - 125°C30.2%31.2%32.2%
VBHOTRisingTJ = –20°C - 125°C33.8%34.4%34.9%
CHARGE OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE)
IBATFET_OCPSystem over load threshold6.0A
PWM
fSWPWM switching frequencyOscillator frequency, buck mode132015001680kHz
Oscillator frequency, boost mode115014121660kHz
DMAXMaximum PWM duty cycle(1)97%
BOOST MODE OPERATION
VOTG_REGBoost mode regulation voltageVVBAT = 3.8 V, I(PMID) = 0 A, BOOSTV[1:0] = '10' = 5.15 V4.9725.1265.280V
VOTG_REG_ACCBoost mode regulation voltage accuracyVVBAT = 3.8 V, I(PMID) = 0 A, BOOSTV[1:0] = '10' = 5.15 V-33%
VBATLOWV_OTGBattery voltage exiting boost modeVVBAT falling, MIN_VBAT_SEL (REG01[0]) = 02.62.82.9V
VVBAT rising, MIN_VBAT_SEL (REG01[0]) = 02.93.03.15V
VVBAT falling, MIN_VBAT_SEL (REG01[0]) = 12.42.52.6V
VVBAT rising, MIN_VBAT_SEL (REG01[0]) = 12.72.82.9V
IOTGOTG mode output currentBOOST_LIM (REG02[7]) = 11.161.41.6A
IOTG_OCP_ACCBoost mode RBFET over-current protection accuracyBOOST_LIM = 0.5 A (REG02[7] = 0)0.50.73A
VOTG_OVPOTG overvoltage thresholdRising threshold5.555.86.15V
IOTG_HSZCPHSFET under current falling threshold100mA
REGN LDO
VREGNREGN LDO output voltageVVBUS = 9V, IREGN = 40mA5.66V
VREGNREGN LDO output voltageVVBUS = 5V, IREGN = 20mA4.584.7V
LOGIC I/O PIN CHARACTERISTICS ( CE, PSEL, SCL, SDA,, INT)
VILOInput low threshold CE0.4V
VIHInput high threshold CE1.3V
IBIASHigh-level leakage current CEPull up rail 1.8 V1µA
VILOInput low threshold PSEL0.4V
VIHInput high threshold PSEL1.3V
IBIASHigh-level leakage current PSELPull up rail 1.8V1µA
LOGIC I/O PIN CHARACTERISTICS ( PG, STAT)
VOLLow-level output voltage0.4V
D+/D– DETECTION
VD+_1P2D+ Threshold for  Non-standard adapter (combined V1P2_VTH_LO and V1P2_VTH_HI)1.051.35V
ID+_LKGLeakage current into D+HiZ-11µA
VD–_600MVSRCVoltage source (600 mV)500600700mV
ID–_100UAISNKD– current sink (100 µA)VD– = 500 mV,50100150µA
RD–_19KD– resistor to ground (19 kΩ)VD– = 500 mV,14.2524.8kΩ
VD–_0P325D– comparator threshold for primary detectionD– pin Rising250400mV
VD–_2P8D– Threshold for  non-standard adapter (combined V2P8_VTH_LO and V2P8_VTH_HI)2.552.85V
VD–_2P0D– Comparator threshold for  non-standard adapter (For non-standard – same as bq2589x)1.852.15V
VD–_1P2D– Threshold for  non-standard adapter (combined V1P2_VTH_LO and V1P2_VTH_HI)1.051.35V
ID–_LKGLeakage current into D–HiZ-11µA
(1) Specified by design. Not production tested.