The BQ25628E uses an I²C compatible interface for flexible charging parameter programming and instantaneous device status reporting. I²C is a bi-directional 2-wire serial interface. Only two open-drain bus lines are required: a serial data line (SDA), and a serial clock line (SCL).

The device has 7-bit I²C address 0x6A, receiving control inputs from a host device such as a micro-controller or digital signal processor through register addresses 0x02 – 0x38. The host device initiates all transfers and the charger responds. Register reads outside of these addresses return 0xFF. When the bus is free, both SDA and SCL lines are HIGH.

The I²C interface supports standard mode (up to 100 kbits/s), fast mode (up to 400 kbits/s) and fast mode plus (up to 1 Mbits/s.) These lines are pulled up to a reference voltage via pull-up resistor. The device I²C detection thresholds support a communication reference voltage from 1.2 V to 5 V.

Due to the ultra low I_Q when the device operates in low power mode, it is necessary ensure a minimum of 128μs between a START command and any subsequent START command on the I²C bus. The recommended minimum t_buf (bus free time between a STOP and START condition) depends on the I²C mode:

• Standard mode (100 kbits/s):
  • No additional requirements
• Fast mode (400 kbits/s):
  • Increase I²C t_buf to at least 80 μs
  • If using repeated start commands, ensure I²C tsu:STA is at least 80 μs
• Fast mode plus (1 Mbits/s):
  • Increase I²C t_buf to at least 120 μs
  • If using repeated start commands, ensure I²C tsu:STA is at least 120 μs

These recommendations assume a successful I²C transaction. It is also necessary to ensure a minimum 128μs time between two START commands in the case of a NACK.